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From: <Conor.Dooley@microchip.com>
To: <palmer@rivosinc.com>, <palmer@dabbelt.com>, <arnd@arndb.de>
Cc: <Conor.Dooley@microchip.com>, <Cyril.Jean@microchip.com>,
	<Daire.McNamara@microchip.com>, <Lewis.Hanly@microchip.com>,
	<aou@eecs.berkeley.edu>, <gregkh@linuxfoundation.org>,
	<herbert@gondor.apana.org.au>, <kw@linux.com>,
	<linux-clk@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-pci@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
	<lorenzo.pieralisi@arm.com>, <mturquette@baylibre.com>,
	<paul.walmsley@sifive.com>, <robh@kernel.org>,
	<bhelgaas@google.com>, <sboyd@kernel.org>, <wsa@kernel.org>
Subject: Re: [RESEND PATCH v4] MAINTAINERS: add polarfire rng, pci and clock drivers
Date: Thu, 7 Jul 2022 13:30:27 +0000	[thread overview]
Message-ID: <a39bad24-d2bb-ef3e-d57a-2ac4fa1156ef@microchip.com> (raw)
In-Reply-To: <20220622225822.2166305-1-mail@conchuod.ie>

On 22/06/2022 23:58, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
> 
> Hardware random, PCI and clock drivers for the PolarFire SoC have been
> upstreamed but are not covered by the MAINTAINERS entry, so add them.
> Daire is the author of the clock & PCI drivers, so add him as a
> maintainer in place of Lewis.
> 
> Acked-by: Bjorn Helgaas <bhelgaas@google.com>
> Acked-by: Stephen Boyd <sboyd@kernel.org>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

Arnd, Palmer:
Does the SoC tree make more sense for this patch?
I am missing an ack from Herbert (but I don't think that's blocking
for a MAINTAINERS update to my own entry?).

If SoC is the better option, should I resend this to soc@kernel.org?
Unfortunately, since I originally sent this patch there have been
other changes to this entry that will conflict in -next (all are
additions so easily resolved...).

I was hoping to get this patch applied to v5.19-rc(foo) since we
never added maintainers entries for these drivers rather than wait
for v5.20.

If you (plural) would rather wait for v5.20, I can resubmit this patch
after v5.20-mw1 with an additional i2c entry (if the driver is applied)
that already has an ack from Wolfram.

Thanks,
Conor.

> ---
>   MAINTAINERS | 5 ++++-
>   1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index a6d3bd9d2a8d..01a7bfa49bdc 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -17136,12 +17136,15 @@ N:	riscv
>   K:	riscv
>   
>   RISC-V/MICROCHIP POLARFIRE SOC SUPPORT
> -M:	Lewis Hanly <lewis.hanly@microchip.com>
>   M:	Conor Dooley <conor.dooley@microchip.com>
> +M:	Daire McNamara <daire.mcnamara@microchip.com>
>   L:	linux-riscv@lists.infradead.org
>   S:	Supported
>   F:	arch/riscv/boot/dts/microchip/
> +F:	drivers/char/hw_random/mpfs-rng.c
> +F:	drivers/clk/microchip/clk-mpfs.c
>   F:	drivers/mailbox/mailbox-mpfs.c
> +F:	drivers/pci/controller/pcie-microchip-host.c
>   F:	drivers/soc/microchip/
>   F:	include/soc/microchip/mpfs.h
>   

  reply	other threads:[~2022-07-07 13:30 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-22 22:58 [RESEND PATCH v4] MAINTAINERS: add polarfire rng, pci and clock drivers Conor Dooley
2022-07-07 13:30 ` Conor.Dooley [this message]
2022-07-07 13:37   ` Arnd Bergmann
2022-07-07 14:07     ` Conor.Dooley
2022-07-08  5:14   ` Herbert Xu

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