From: Baruch Siach <baruch@tkos.co.il>
To: Andy Gross <agross@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Baruch Siach <baruch.siach@siklu.com>,
Rob Herring <robh@kernel.org>,
Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>,
Kathiravan T <kathirav@codeaurora.org>,
Bjorn Helgaas <bhelgaas@google.com>,
Rob Herring <robh+dt@kernel.org>,
Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Jingoo Han <jingoohan1@gmail.com>,
Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
Robert Marko <robert.marko@sartura.hr>,
linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-tegra@vger.kernel.org
Subject: [PATCH v4 2/3] PCI: dwc: tegra: move GEN3_RELATED DBI register to common header
Date: Mon, 27 Dec 2021 08:46:04 +0200 [thread overview]
Message-ID: <a81f7a7caf16dc8692019e9ed5f8cba15013ce30.1640587131.git.baruch@tkos.co.il> (raw)
In-Reply-To: <cover.1640587131.git.baruch@tkos.co.il>
From: Baruch Siach <baruch.siach@siklu.com>
These are common dwc macros that will be used for other platforms.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Baruch Siach <baruch.siach@siklu.com>
---
drivers/pci/controller/dwc/pcie-designware.h | 6 ++++++
drivers/pci/controller/dwc/pcie-tegra194.c | 6 ------
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index 7d6e9b7576be..ea87809ee298 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -74,6 +74,12 @@
#define PCIE_MSI_INTR0_MASK 0x82C
#define PCIE_MSI_INTR0_STATUS 0x830
+#define GEN3_RELATED_OFF 0x890
+#define GEN3_RELATED_OFF_GEN3_ZRXDC_NONCOMPL BIT(0)
+#define GEN3_RELATED_OFF_GEN3_EQ_DISABLE BIT(16)
+#define GEN3_RELATED_OFF_RATE_SHADOW_SEL_SHIFT 24
+#define GEN3_RELATED_OFF_RATE_SHADOW_SEL_MASK GENMASK(25, 24)
+
#define PCIE_PORT_MULTI_LANE_CTRL 0x8C0
#define PORT_MLTI_UPCFG_SUPPORT BIT(7)
diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index 904976913081..846c9d154f49 100644
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -193,12 +193,6 @@
#define GEN3_EQ_CONTROL_OFF_PSET_REQ_VEC_MASK GENMASK(23, 8)
#define GEN3_EQ_CONTROL_OFF_FB_MODE_MASK GENMASK(3, 0)
-#define GEN3_RELATED_OFF 0x890
-#define GEN3_RELATED_OFF_GEN3_ZRXDC_NONCOMPL BIT(0)
-#define GEN3_RELATED_OFF_GEN3_EQ_DISABLE BIT(16)
-#define GEN3_RELATED_OFF_RATE_SHADOW_SEL_SHIFT 24
-#define GEN3_RELATED_OFF_RATE_SHADOW_SEL_MASK GENMASK(25, 24)
-
#define PORT_LOGIC_AMBA_ERROR_RESPONSE_DEFAULT 0x8D0
#define AMBA_ERROR_RESPONSE_CRS_SHIFT 3
#define AMBA_ERROR_RESPONSE_CRS_MASK GENMASK(1, 0)
--
2.34.1
next prev parent reply other threads:[~2021-12-27 6:46 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-27 6:46 [PATCH v4 0/3] PCI: IPQ6018 PCIe controller support Baruch Siach
2021-12-27 6:46 ` [PATCH v4 1/3] arm64: dts: qcom: ipq6018: add pcie max-link-speed Baruch Siach
2022-02-01 5:19 ` (subset) " Bjorn Andersson
2021-12-27 6:46 ` Baruch Siach [this message]
2021-12-27 6:46 ` [PATCH v4 3/3] PCI: qcom: add support for IPQ60xx PCIe controller Baruch Siach
2022-01-06 14:45 ` Lorenzo Pieralisi
2022-01-06 18:05 ` Baruch Siach
2022-01-06 23:20 ` Bjorn Andersson
2022-01-06 23:54 ` Pali Rohár
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