From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Return-Path: Subject: Re: [PATCH v2 08/22] PCI: dwc: designware: Add EP mode support To: Kishon Vijay Abraham I , Joao Pinto , Bjorn Helgaas , Jingoo Han References: <1487325042-28227-1-git-send-email-kishon@ti.com> <1487325042-28227-9-git-send-email-kishon@ti.com> <45e5288e-d11f-c855-af9b-692a42d878c6@synopsys.com> <58BE42B2.20305@ti.com> <02461be2-268d-485a-2bc4-3b148726d37d@synopsys.com> From: Joao Pinto Message-ID: Date: Wed, 8 Mar 2017 11:32:58 +0000 MIME-Version: 1.0 In-Reply-To: <02461be2-268d-485a-2bc4-3b148726d37d@synopsys.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-pci@vger.kernel.org, nsekhar@ti.com, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+bjorn=helgaas.com@lists.infradead.org List-ID: Hi Kishon, >> Can you provide PCIE_GET_ATU_INB_UNR_REG_OFFSET (similar to >> PCIE_GET_ATU_OUTB_UNR_REG_OFFSET)? > > Yes of course, I will send you the definition soon. As promissed here is the definition for Inbound: +/* register address builder */ +#define PCIE_GET_ATU_INB_UNR_REG_ADDR(region, register) \ + ((0x3 << 20) | (region << 9) | \ + (0x1 << 8) | (register << 2)) Thanks, Joao > > Thanks, > Joao > >> >> Thanks >> Kishon >> > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel