From: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
To: linux-pci@vger.kernel.org
Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Joao Pinto <joao.pinto@synopsys.com>,
Jingoo Han <jingoohan1@gmail.com>
Subject: [PATCH 3/9] PCI: dwc: Replace variable name from data to d on dw_pci_bottom_mask/unmask()
Date: Wed, 16 Jan 2019 11:14:16 +0100 [thread overview]
Message-ID: <ab9e5de92e2c8c29ec1ee8b1303430c57fb937e5.1547631485.git.gustavo.pimentel@synopsys.com> (raw)
In-Reply-To: <cover.1547631485.git.gustavo.pimentel@synopsys.com>
In-Reply-To: <cover.1547631485.git.gustavo.pimentel@synopsys.com>
Replace variable from data to d to maintain coherency between similar
functions, such as dw_msi_mask_irq() and dw_msi_unmask_irq().
No functional change is intended.
Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Joao Pinto <jpinto@synopsys.com>
Cc: Jingoo Han <jingoohan1@gmail.com>
---
drivers/pci/controller/dwc/pcie-designware-host.c | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index 721d60a..36e284c 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -149,20 +149,20 @@ static int dw_pci_msi_set_affinity(struct irq_data *irq_data,
return -EINVAL;
}
-static void dw_pci_bottom_mask(struct irq_data *data)
+static void dw_pci_bottom_mask(struct irq_data *d)
{
- struct pcie_port *pp = irq_data_get_irq_chip_data(data);
+ struct pcie_port *pp = irq_data_get_irq_chip_data(d);
unsigned int res, bit, ctrl;
unsigned long flags;
raw_spin_lock_irqsave(&pp->lock, flags);
if (pp->ops->msi_clear_irq) {
- pp->ops->msi_clear_irq(pp, data->hwirq);
+ pp->ops->msi_clear_irq(pp, d->hwirq);
} else {
- ctrl = data->hwirq / MAX_MSI_IRQS_PER_CTRL;
+ ctrl = d->hwirq / MAX_MSI_IRQS_PER_CTRL;
res = ctrl * MSI_REG_CTRL_BLOCK_SIZE;
- bit = data->hwirq % MAX_MSI_IRQS_PER_CTRL;
+ bit = d->hwirq % MAX_MSI_IRQS_PER_CTRL;
pp->irq_status[ctrl] &= ~(1 << bit);
dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_MASK + res, 4,
@@ -172,20 +172,20 @@ static void dw_pci_bottom_mask(struct irq_data *data)
raw_spin_unlock_irqrestore(&pp->lock, flags);
}
-static void dw_pci_bottom_unmask(struct irq_data *data)
+static void dw_pci_bottom_unmask(struct irq_data *d)
{
- struct pcie_port *pp = irq_data_get_irq_chip_data(data);
+ struct pcie_port *pp = irq_data_get_irq_chip_data(d);
unsigned int res, bit, ctrl;
unsigned long flags;
raw_spin_lock_irqsave(&pp->lock, flags);
if (pp->ops->msi_set_irq) {
- pp->ops->msi_set_irq(pp, data->hwirq);
+ pp->ops->msi_set_irq(pp, d->hwirq);
} else {
- ctrl = data->hwirq / MAX_MSI_IRQS_PER_CTRL;
+ ctrl = d->hwirq / MAX_MSI_IRQS_PER_CTRL;
res = ctrl * MSI_REG_CTRL_BLOCK_SIZE;
- bit = data->hwirq % MAX_MSI_IRQS_PER_CTRL;
+ bit = d->hwirq % MAX_MSI_IRQS_PER_CTRL;
pp->irq_status[ctrl] |= 1 << bit;
dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_MASK + res, 4,
--
2.7.4
next prev parent reply other threads:[~2019-01-16 10:14 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-16 10:14 [PATCH 0/9] Improve Synopsys DesignWare Root Complex driver code Gustavo Pimentel
2019-01-16 10:14 ` [PATCH 1/9] PCI: dwc: Remove unnecessary header include (of_gpio.h) Gustavo Pimentel
2019-01-16 10:14 ` [PATCH 2/9] PCI: dwc: Remove unnecessary header include (signal.h) Gustavo Pimentel
2019-01-16 10:14 ` Gustavo Pimentel [this message]
2019-01-31 16:21 ` [PATCH 3/9] PCI: dwc: Replace variable name from data to d on dw_pci_bottom_mask/unmask() Lorenzo Pieralisi
2019-01-16 10:14 ` [PATCH 4/9] PCI: dwc: Replace variable name from data to d on dw_pci_setup_msi_msg() Gustavo Pimentel
2019-01-16 10:14 ` [PATCH 5/9] PCI: dwc: Replace variable name from data to d on dw_pci_msi_set_affinity() Gustavo Pimentel
2019-01-16 10:14 ` [PATCH 6/9] PCI: dwc: Replace variable name from data to d on dw_pcie_irq_domain_free() Gustavo Pimentel
2019-01-16 10:14 ` [PATCH 7/9] PCI: dwc: Improve code readability and simplifies mask/unmask operations Gustavo Pimentel
2019-01-31 16:22 ` Lorenzo Pieralisi
2019-01-31 18:00 ` Gustavo Pimentel
2019-01-16 10:14 ` [PATCH 8/9] PCI: dwc: Replace bit rotation operation (1 << bit) by BIT(bit) Gustavo Pimentel
2019-01-16 10:14 ` [PATCH 9/9] PCI: dwc: Add pcie port pointer validation Gustavo Pimentel
2019-01-31 16:51 ` Lorenzo Pieralisi
2019-01-31 17:37 ` Gustavo Pimentel
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ab9e5de92e2c8c29ec1ee8b1303430c57fb937e5.1547631485.git.gustavo.pimentel@synopsys.com \
--to=gustavo.pimentel@synopsys.com \
--cc=jingoohan1@gmail.com \
--cc=joao.pinto@synopsys.com \
--cc=linux-pci@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).