From: "Maciej W. Rozycki" <macro@orcam.me.uk>
To: Bjorn Helgaas <bhelgaas@google.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
"H. Peter Anvin" <hpa@zytor.com>
Cc: x86@kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PING][RESEND^2][PATCH v3] x86/PCI: Add support for the Intel 82378ZB/82379AB (SIO/SIO.A) PIRQ router
Date: Tue, 18 Oct 2022 13:21:39 +0100 (BST) [thread overview]
Message-ID: <alpine.DEB.2.21.2210181318560.50489@angie.orcam.me.uk> (raw)
In-Reply-To: <alpine.DEB.2.21.2208291916390.61470@angie.orcam.me.uk>
On Mon, 29 Aug 2022, Maciej W. Rozycki wrote:
> The Intel 82378ZB System I/O (SIO) and 82379AB System I/O APIC (SIO.A)
> ISA bridges implement PCI interrupt steering with a PIRQ router[1][2]
> that is exactly the same as that of the PIIX and ICH southbridges (or
> actually the other way round, given that the SIO ASIC was there first).
Ping for:
<https://lore.kernel.org/lkml/alpine.DEB.2.21.2208291916390.61470@angie.orcam.me.uk/>.
Maciej
prev parent reply other threads:[~2022-10-18 12:21 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-29 18:23 [RESEND^2][PATCH v3] x86/PCI: Add support for the Intel 82378ZB/82379AB (SIO/SIO.A) PIRQ router Maciej W. Rozycki
2022-08-30 20:14 ` Bjorn Helgaas
2022-10-18 12:21 ` Maciej W. Rozycki [this message]
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