From: "Maciej W. Rozycki" <macro@orcam.me.uk>
To: Bjorn Helgaas <bhelgaas@google.com>,
Dennis Dalessandro <dennis.dalessandro@cornelisnetworks.com>,
Jason Gunthorpe <jgg@ziepe.ca>, Leon Romanovsky <leon@kernel.org>
Cc: linux-pci@vger.kernel.org, linux-rdma@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 1/2] PCI: Export pci_parent_bus_reset() for drivers to use
Date: Tue, 20 Jun 2023 10:49:14 +0100 (BST) [thread overview]
Message-ID: <alpine.DEB.2.21.2306200231020.14084@angie.orcam.me.uk> (raw)
In-Reply-To: <alpine.DEB.2.21.2306200153110.14084@angie.orcam.me.uk>
Export pci_parent_bus_reset() so that drivers do not duplicate it.
Document the interface.
Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk>
---
drivers/pci/pci.c | 15 ++++++++++++++-
include/linux/pci.h | 1 +
2 files changed, 15 insertions(+), 1 deletion(-)
linux-pci-parent-bus-reset-export.diff
Index: linux-macro/drivers/pci/pci.c
===================================================================
--- linux-macro.orig/drivers/pci/pci.c
+++ linux-macro/drivers/pci/pci.c
@@ -5149,7 +5149,19 @@ int pci_bridge_secondary_bus_reset(struc
}
EXPORT_SYMBOL_GPL(pci_bridge_secondary_bus_reset);
-static int pci_parent_bus_reset(struct pci_dev *dev, bool probe)
+/**
+ * pci_parent_bus_reset - Reset a device via its upstream PCI bridge
+ * @dev: Device to reset.
+ * @probe: Only check if reset is possible if TRUE, actually reset if FALSE.
+ *
+ * Perform a device reset by requesting a secondary bus reset via the
+ * device's immediate upstream PCI bridge. Return 0 if successful or
+ * -ENOTTY if the reset failed or it could not have been issued in the
+ * first place because the device is not on a secondary bus of any PCI
+ * bridge or it wouldn't be the only device reset. If probing, then
+ * only verify whether it would be possible to issue a reset.
+ */
+int pci_parent_bus_reset(struct pci_dev *dev, bool probe)
{
struct pci_dev *pdev;
@@ -5166,6 +5178,7 @@ static int pci_parent_bus_reset(struct p
return pci_bridge_secondary_bus_reset(dev->bus->self);
}
+EXPORT_SYMBOL_GPL(pci_parent_bus_reset);
static int pci_reset_hotplug_slot(struct hotplug_slot *hotplug, bool probe)
{
Index: linux-macro/include/linux/pci.h
===================================================================
--- linux-macro.orig/include/linux/pci.h
+++ linux-macro/include/linux/pci.h
@@ -1447,6 +1447,7 @@ int devm_request_pci_bus_resources(struc
/* Temporary until new and working PCI SBR API in place */
int pci_bridge_secondary_bus_reset(struct pci_dev *dev);
+int pci_parent_bus_reset(struct pci_dev *dev, bool probe);
#define __pci_bus_for_each_res0(bus, res, ...) \
for (unsigned int __b = 0; \
next prev parent reply other threads:[~2023-06-20 9:52 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-20 9:49 [PATCH 0/2] PCI+IB/hfi1: Fold duplicate secondary bus reset code Maciej W. Rozycki
2023-06-20 9:49 ` Maciej W. Rozycki [this message]
2023-08-08 16:47 ` [PATCH 1/2] PCI: Export pci_parent_bus_reset() for drivers to use Ilpo Järvinen
2023-06-20 9:49 ` [PATCH 2/2] IB/hfi1: Remove pci_parent_bus_reset() duplication Maciej W. Rozycki
2023-08-08 16:51 ` Ilpo Järvinen
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