From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.5 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AC961C433DB for ; Tue, 9 Feb 2021 00:46:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6B2C964E10 for ; Tue, 9 Feb 2021 00:46:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229615AbhBIAqb (ORCPT ); Mon, 8 Feb 2021 19:46:31 -0500 Received: from mga07.intel.com ([134.134.136.100]:34289 "EHLO mga07.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229545AbhBIAqb (ORCPT ); Mon, 8 Feb 2021 19:46:31 -0500 IronPort-SDR: 4z8v5yUdjK0xIw9MRgmMisc9g9CNqg/rVn61bSMIncvc6mR2X+NTT4qhy4soXi3FGnpyV/7k29 A91Pdtj9d08Q== X-IronPort-AV: E=McAfee;i="6000,8403,9889"; a="245876489" X-IronPort-AV: E=Sophos;i="5.81,163,1610438400"; d="scan'208";a="245876489" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Feb 2021 16:44:44 -0800 IronPort-SDR: enOuzo18U2oGng79sCChbSrbRM4bcsc9GQgCOvaOuEffFQ0NISs9JtDKtOPC8yFunfxI8n8w9g AsjDfiVFX3tg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.81,163,1610438400"; d="scan'208";a="411603615" Received: from allen-box.sh.intel.com (HELO [10.239.159.128]) ([10.239.159.128]) by fmsmga004.fm.intel.com with ESMTP; 08 Feb 2021 16:44:39 -0800 Cc: baolu.lu@linux.intel.com, tglx@linutronix.de, linux-kernel@vger.kernel.org, dave.jiang@intel.com, ashok.raj@intel.com, kevin.tian@intel.com, dwmw@amazon.co.uk, x86@kernel.org, tony.luck@intel.com, dan.j.williams@intel.com, jgg@mellanox.com, kvm@vger.kernel.org, iommu@lists.linux-foundation.org, alex.williamson@redhat.com, bhelgaas@google.com, maz@kernel.org, linux-pci@vger.kernel.org, ravi.v.shankar@intel.com Subject: Re: [PATCH 11/12] platform-msi: Add platform check for subdevice irq domain To: Leon Romanovsky , Megha Dey References: <1612385805-3412-1-git-send-email-megha.dey@intel.com> <1612385805-3412-12-git-send-email-megha.dey@intel.com> <20210208082148.GA20265@unreal> From: Lu Baolu Message-ID: Date: Tue, 9 Feb 2021 08:36:08 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20210208082148.GA20265@unreal> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Hi Leon, On 2/8/21 4:21 PM, Leon Romanovsky wrote: > On Wed, Feb 03, 2021 at 12:56:44PM -0800, Megha Dey wrote: >> From: Lu Baolu >> >> The pci_subdevice_msi_create_irq_domain() should fail if the underlying >> platform is not able to support IMS (Interrupt Message Storage). Otherwise, >> the isolation of interrupt is not guaranteed. >> >> For x86, IMS is only supported on bare metal for now. We could enable it >> in the virtualization environments in the future if interrupt HYPERCALL >> domain is supported or the hardware has the capability of interrupt >> isolation for subdevices. >> >> Cc: David Woodhouse >> Cc: Leon Romanovsky >> Cc: Kevin Tian >> Suggested-by: Thomas Gleixner >> Link: https://lore.kernel.org/linux-pci/87pn4nk7nn.fsf@nanos.tec.linutronix.de/ >> Link: https://lore.kernel.org/linux-pci/877dqrnzr3.fsf@nanos.tec.linutronix.de/ >> Link: https://lore.kernel.org/linux-pci/877dqqmc2h.fsf@nanos.tec.linutronix.de/ >> Signed-off-by: Lu Baolu >> Signed-off-by: Megha Dey >> --- >> arch/x86/pci/common.c | 74 +++++++++++++++++++++++++++++++++++++++++++++ >> drivers/base/platform-msi.c | 8 +++++ >> include/linux/msi.h | 1 + >> 3 files changed, 83 insertions(+) >> >> diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c >> index 3507f45..263ccf6 100644 >> --- a/arch/x86/pci/common.c >> +++ b/arch/x86/pci/common.c >> @@ -12,6 +12,8 @@ >> #include >> #include >> #include >> +#include >> +#include >> >> #include >> #include >> @@ -724,3 +726,75 @@ struct pci_dev *pci_real_dma_dev(struct pci_dev *dev) >> return dev; >> } >> #endif >> + >> +#ifdef CONFIG_DEVICE_MSI > > Sorry for my naive question, but I see it in all your patches in this series > and wonder why did you wrap everything with ifdefs?. The added code is only called when DEVICE_MSI is configured. > > All *.c code is wrapped with those ifdefs, which is hard to navigate and > unlikely to give any code/size optimization benefit if kernel is compiled > without CONFIG_DEVICE_MSI. The more common approach is to put those > ifdef in the public header files and leave to the compiler to drop not > called functions. Yes. This looks better. > > Thanks > Best regards, baolu