Re: [PATCH] PCI: Add CRS timeout for pci_device_is_present()

[Vidya Sagar <vidyas@nvidia.com>]

On 11/15/2019 12:06 AM, Bjorn Helgaas wrote:
> On Wed, Nov 13, 2019 at 12:20:43PM +0100, Thierry Reding wrote:
>> On Tue, Nov 12, 2019 at 12:58:44PM -0600, Bjorn Helgaas wrote:
> 
>>> My question is whether this wait should be connected somehow with
>>> platform_pci_set_power_state().  It sounds like the tegra host
>>> controller driver already does the platform-specific delays, and I'm
>>> not sure it's reasonable for platform_pci_set_power_state() to do the
>>> CRS polling.  Maybe something like this?  I'd really like to get
>>> Rafael's thinking here.
>>>
>>> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
>>> index e7982af9a5d8..052fa316c917 100644
>>> --- a/drivers/pci/pci.c
>>> +++ b/drivers/pci/pci.c
>>> @@ -964,9 +964,14 @@ void pci_refresh_power_state(struct pci_dev *dev)
>>>    */
>>>   void pci_power_up(struct pci_dev *dev)
>>>   {
>>> +	pci_power_state_t prev_state = dev->current_state;
>>> +
>>>   	if (platform_pci_power_manageable(dev))
>>>   		platform_pci_set_power_state(dev, PCI_D0);
>>>   
>>> +	if (prev_state == PCI_D3cold)
>>> +		pci_dev_wait(dev, "D3cold->D0", PCIE_RESET_READY_POLL_MS);
>>
>> Is there any reason in particular why you chose to call pci_dev_wait()?
>> It seems to me like that's a little broader than pci_bus_wait_crs(). The
>> latter is static in drivers/pci/probe.c so we'd need to change that in
>> order to use it from drivers/pci/pci.c, but it sounds like the more
>> explicit thing to do.
> 
> Broader in what sense?  They work essentially identically except that
> pci_bus_wait_crs() doesn't need a pci_dev * (because it's used during
> enumeration when we don't have a pci_dev yet) and it does dword reads
> instead of word reads.
> 
> It is a shame that the logic is duplicated, but we don't have to worry
> about that here.
> 
> I think I would stick with pci_dev_wait() in this case since we do
> have a pci_dev * and it's a little simpler, unless I'm missing the
> advantage of pci_bus_wait_crs().
Is there any specific reason why should there be a check for the state?
In Tegra series, I observe that, by the time execution comes to this point,
prev_state is PCI_D3Hot and in Tegra194 particularly, it is PCI_D0 because the
host controller driver explicitly keeps the downstream devices in PCI_D0 state
as a work around for one of the Tegra194 specific issues. So, I feel the check
for current_state may not be need here(?)

- Vidya Sagar
> 
> Bjorn
>