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From: Kishon Vijay Abraham I <>
To: "Lad, Prabhakar" <>,
Subject: Re: [Query] : PCIe - Endpoint Function
Date: Thu, 10 Oct 2019 17:02:18 +0530
Message-ID: <> (raw)
In-Reply-To: <>

Hi Prabhakar,

On 10/10/19 4:57 PM, Lad, Prabhakar wrote:
> Hello,
> I am currently working on adding pcie-endpoint support for a
> controller, this controller doesn't support outbound- inbound address
> translations, it has 1-1 mapping between the CPU and PCI addresses,
> the current endpoint framework is based on  outbound-inbound
> translations, what is the best approach to add this support, or is
> there any WIP already for it ?

How will the endpoint access host buffer without outbound ATU? I assume the PCI
address reserved for endpoint is not the full 32-bit or 64-bit address space?
In that case, the endpoint cannot directly access the host buffer (unless the
host already knows the address space of the endpoint and gives the endpoint an
address in its OB address space).


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Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-10 11:27 Lad, Prabhakar
2019-10-10 11:32 ` Kishon Vijay Abraham I [this message]
2019-10-11  7:35   ` Lad, Prabhakar
2019-10-11 13:37     ` Lad, Prabhakar
2019-10-15  7:52       ` Kishon Vijay Abraham I
2019-10-22  6:06         ` Lad, Prabhakar
2019-10-29 10:24           ` Lad, Prabhakar
2019-10-29 10:53             ` Kishon Vijay Abraham I
2019-10-29 14:55               ` Lad, Prabhakar

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