From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.3 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_2 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 890C9C433DB for ; Thu, 25 Feb 2021 10:45:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2E40D64E21 for ; Thu, 25 Feb 2021 10:45:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234244AbhBYKoq (ORCPT ); Thu, 25 Feb 2021 05:44:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33230 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234905AbhBYKmn (ORCPT ); Thu, 25 Feb 2021 05:42:43 -0500 Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:8b0:10b:1231::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F241CC061574; Thu, 25 Feb 2021 02:41:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=merlin.20170209; h=Mime-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=Aruk33xZ+gOBQG2U7s/GxJHMoTrWMEiLVMJiY5dxrDc=; b=mXI7AJzCixCwfgb0LMl9xc7kbR uZBIUY6HxAgsvM8rj6ExSefSoVGvuygcKxdPLQpQY0jsV/oIbI9KadWP6xwu7iDOenw3hBeczoJT3 xbkLLP/g4RtIa1a9Yal7l134ILd78aYA7rzvs08WCbaYVb4EwjTCfIg54V6d7PdAxH+Reqvc+FR+B Hqx7X6WxgidgMLI+k9HAQM0niDM4iX+OFNYYpzjXXbv3Brcr6BvnkpzJAUV7Zn9JOXUScHkftUt3N y/hlpaoAUXseWboHzbBegqKfZaOfSp5Buhpt6u7XStiSzlob2p9PECBduNEbgXdLzQunrnMicsdCw SksO2UZw==; Received: from 54-240-197-238.amazon.com ([54.240.197.238] helo=freeip.amazon.com) by merlin.infradead.org with esmtpsa (Exim 4.92.3 #3 (Red Hat Linux)) id 1lFE5d-0004IL-Rg; Thu, 25 Feb 2021 10:41:50 +0000 Message-ID: Subject: Re: RPi4 can't deal with 64 bit PCI accesses From: David Woodhouse To: Christoph Hellwig , Florian Fainelli Cc: Robin Murphy , Nicolas Saenz Julienne , linux-pci , linux-arm-kernel , linux-rpi-kernel , devicetree , Rob Herring , Bjorn Helgaas , Robin Murphy , bcm-kernel-feedback-list Date: Thu, 25 Feb 2021 10:41:47 +0000 In-Reply-To: <20210224202538.GA2346950@infradead.org> References: <2220c875-f327-586c-79c7-eadff87e4b4d@arm.com> <6088038a-2366-2f63-0678-c65a0d2efabd@gmail.com> <20210224202538.GA2346950@infradead.org> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/x-pkcs7-signature"; boundary="=-wJGH8NWlp/fjf126vMji" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 Mime-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by merlin.infradead.org. See http://www.infradead.org/rpr.html Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org --=-wJGH8NWlp/fjf126vMji Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Wed, 2021-02-24 at 20:25 +0000, Christoph Hellwig wrote: > On Wed, Feb 24, 2021 at 08:55:10AM -0800, Florian Fainelli wrote: > > > Working around kernel I/O accessors is all very well, but another > > > concern for PCI in particular is when things like framebuffer memory = can > > > get mmap'ed into userspace (or even memremap'ed within the kernel). E= ven > > > in AArch32, compiled code may result in 64-bit accesses being generat= ed > > > depending on how the CPU and interconnect handle LDRD/STRD/LDM/STM/et= c., > > > so it's basically not safe to ever let that happen at all. > >=20 > > Agreed, this makes finding a generic solution a tiny bit harder. Do you > > have something in mind Nicolas? >=20 > The only workable solution is a new >=20 > bool 64bit_mmio_supported(void) >=20 > check that is used like: >=20 > if (64bit_mmio_supported()) > readq(foodev->regs, REG_OFFSET); > else > lo_hi_readq(foodev->regs, REG_OFFSET); >=20 > where 64bit_mmio_supported() return false for all 32-bit kernels, > true for all non-broken 64-bit kernels and is an actual function > for arm64 multiplatforms builds that include te RPi quirk. >=20 > The above would then replace the existing magic from the > and > headers. Is it completely impossible to do 64-bit cycles with this host bridge? I'm now having nasty flashbacks to an SH platform with a host bridge that screwed up byte access for direct MMIO =E2=80=94 but *could* do those = MMIO cycles accurately if we did them through an indirect method similar to config cycles. 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