* [PATCH v13 1/5] PCI/DPC: Ignore devices with no AER Capability
2021-01-23 1:11 [PATCH v13 0/5] Simplify PCIe native ownership Kuppuswamy Sathyanarayanan
@ 2021-01-23 1:11 ` Kuppuswamy Sathyanarayanan
2021-01-23 1:11 ` [PATCH v13 2/5] PCI: Assume control of portdrv-related features only when portdrv enabled Kuppuswamy Sathyanarayanan
` (4 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Kuppuswamy Sathyanarayanan @ 2021-01-23 1:11 UTC (permalink / raw)
To: bhelgaas; +Cc: linux-pci, linux-kernel, ashok.raj, sathyanarayanan.kuppuswamy
From: Bjorn Helgaas <bhelgaas@google.com>
Downstream Ports may support DPC regardless of whether they support AER
(see PCIe r5.0, sec 6.2.10.2). Previously, if the user booted with
"pcie_ports=dpc-native", it was possible for dpc_probe() to succeed even if
the device had no AER Capability, but dpc_get_aer_uncorrect_severity()
depends on the AER Capability.
dpc_probe() previously failed if:
!pcie_aer_is_native(pdev) && !pcie_ports_dpc_native
!(pcie_aer_is_native() || pcie_ports_dpc_native) # by De Morgan's law
so it succeeded if:
pcie_aer_is_native() || pcie_ports_dpc_native
Fail dpc_probe() if the device has no AER Capability.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Olof Johansson <olof@lixom.net>
---
drivers/pci/pcie/dpc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c
index e05aba86a317..ed0dbc43d018 100644
--- a/drivers/pci/pcie/dpc.c
+++ b/drivers/pci/pcie/dpc.c
@@ -287,6 +287,9 @@ static int dpc_probe(struct pcie_device *dev)
int status;
u16 ctl, cap;
+ if (!pdev->aer_cap)
+ return -ENOTSUPP;
+
if (!pcie_aer_is_native(pdev) && !pcie_ports_dpc_native)
return -ENOTSUPP;
--
2.25.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v13 2/5] PCI: Assume control of portdrv-related features only when portdrv enabled
2021-01-23 1:11 [PATCH v13 0/5] Simplify PCIe native ownership Kuppuswamy Sathyanarayanan
2021-01-23 1:11 ` [PATCH v13 1/5] PCI/DPC: Ignore devices with no AER Capability Kuppuswamy Sathyanarayanan
@ 2021-01-23 1:11 ` Kuppuswamy Sathyanarayanan
2021-01-23 1:11 ` [PATCH v13 3/5] PCI/ACPI: Tidy _OSC control bit checking Kuppuswamy Sathyanarayanan
` (3 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Kuppuswamy Sathyanarayanan @ 2021-01-23 1:11 UTC (permalink / raw)
To: bhelgaas; +Cc: linux-pci, linux-kernel, ashok.raj, sathyanarayanan.kuppuswamy
Native control of PME, AER, DPC, and PCIe hotplug depends on the portdrv,
so default to native handling of them only when CONFIG_PCIEPORTBUS is
enabled.
Native control LTR and SHPC hotplug does not depend on portdrv, so we can
always take control of them unless some platform interface, e.g., _OSC,
tells us otherwise.
[bhelgaas: commit log]
Link: https://lore.kernel.org/r/fcbe8a624166a1101a755edfef44a185d32ff493.1603766889.git.sathyanarayanan.kuppuswamy@linux.intel.com
Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
drivers/pci/probe.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 953f15abc850..97498f61f5ad 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -588,12 +588,14 @@ static void pci_init_host_bridge(struct pci_host_bridge *bridge)
* may implement its own AER handling and use _OSC to prevent the
* OS from interfering.
*/
+#ifdef CONFIG_PCIEPORTBUS
bridge->native_aer = 1;
bridge->native_pcie_hotplug = 1;
- bridge->native_shpc_hotplug = 1;
bridge->native_pme = 1;
- bridge->native_ltr = 1;
bridge->native_dpc = 1;
+#endif
+ bridge->native_ltr = 1;
+ bridge->native_shpc_hotplug = 1;
device_initialize(&bridge->dev);
}
--
2.25.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v13 3/5] PCI/ACPI: Tidy _OSC control bit checking
2021-01-23 1:11 [PATCH v13 0/5] Simplify PCIe native ownership Kuppuswamy Sathyanarayanan
2021-01-23 1:11 ` [PATCH v13 1/5] PCI/DPC: Ignore devices with no AER Capability Kuppuswamy Sathyanarayanan
2021-01-23 1:11 ` [PATCH v13 2/5] PCI: Assume control of portdrv-related features only when portdrv enabled Kuppuswamy Sathyanarayanan
@ 2021-01-23 1:11 ` Kuppuswamy Sathyanarayanan
2021-01-23 1:11 ` [PATCH v13 4/5] PCI/ACPI: Centralize pcie_ports_native checking Kuppuswamy Sathyanarayanan
` (2 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Kuppuswamy Sathyanarayanan @ 2021-01-23 1:11 UTC (permalink / raw)
To: bhelgaas; +Cc: linux-pci, linux-kernel, ashok.raj, sathyanarayanan.kuppuswamy
Add OSC_OWNER() helper to prettify checking the _OSC control bits to learn
whether the platform has granted us control of PCI features. No functional
change intended.
[bhelgaas: split to separate patch, commit log]
Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
drivers/acpi/pci_root.c | 29 +++++++++++++++++------------
1 file changed, 17 insertions(+), 12 deletions(-)
diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
index 0bf072cef6cf..601fbe905993 100644
--- a/drivers/acpi/pci_root.c
+++ b/drivers/acpi/pci_root.c
@@ -874,6 +874,12 @@ static void acpi_pci_root_release_info(struct pci_host_bridge *bridge)
__acpi_pci_root_release_info(bridge->release_data);
}
+#define OSC_OWNER(ctrl, bit, flag) \
+ do { \
+ if (!(ctrl & bit)) \
+ flag = 0; \
+ } while (0)
+
struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
struct acpi_pci_root_ops *ops,
struct acpi_pci_root_info *info,
@@ -885,6 +891,7 @@ struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
struct pci_bus *bus;
struct pci_host_bridge *host_bridge;
union acpi_object *obj;
+ u32 ctrl;
info->root = root;
info->bridge = device;
@@ -910,18 +917,16 @@ struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
goto out_release_info;
host_bridge = to_pci_host_bridge(bus->bridge);
- if (!(root->osc_control_set & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL))
- host_bridge->native_pcie_hotplug = 0;
- if (!(root->osc_control_set & OSC_PCI_SHPC_NATIVE_HP_CONTROL))
- host_bridge->native_shpc_hotplug = 0;
- if (!(root->osc_control_set & OSC_PCI_EXPRESS_AER_CONTROL))
- host_bridge->native_aer = 0;
- if (!(root->osc_control_set & OSC_PCI_EXPRESS_PME_CONTROL))
- host_bridge->native_pme = 0;
- if (!(root->osc_control_set & OSC_PCI_EXPRESS_LTR_CONTROL))
- host_bridge->native_ltr = 0;
- if (!(root->osc_control_set & OSC_PCI_EXPRESS_DPC_CONTROL))
- host_bridge->native_dpc = 0;
+
+ ctrl = root->osc_control_set;
+ OSC_OWNER(ctrl, OSC_PCI_EXPRESS_NATIVE_HP_CONTROL,
+ host_bridge->native_pcie_hotplug);
+ OSC_OWNER(ctrl, OSC_PCI_SHPC_NATIVE_HP_CONTROL,
+ host_bridge->native_shpc_hotplug);
+ OSC_OWNER(ctrl, OSC_PCI_EXPRESS_AER_CONTROL, host_bridge->native_aer);
+ OSC_OWNER(ctrl, OSC_PCI_EXPRESS_PME_CONTROL, host_bridge->native_pme);
+ OSC_OWNER(ctrl, OSC_PCI_EXPRESS_LTR_CONTROL, host_bridge->native_ltr);
+ OSC_OWNER(ctrl, OSC_PCI_EXPRESS_DPC_CONTROL, host_bridge->native_dpc);
/*
* Evaluate the "PCI Boot Configuration" _DSM Function. If it
--
2.25.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v13 4/5] PCI/ACPI: Centralize pcie_ports_native checking
2021-01-23 1:11 [PATCH v13 0/5] Simplify PCIe native ownership Kuppuswamy Sathyanarayanan
` (2 preceding siblings ...)
2021-01-23 1:11 ` [PATCH v13 3/5] PCI/ACPI: Tidy _OSC control bit checking Kuppuswamy Sathyanarayanan
@ 2021-01-23 1:11 ` Kuppuswamy Sathyanarayanan
2021-01-23 1:11 ` [PATCH v13 5/5] PCI/ACPI: Centralize pci_aer_available() checking Kuppuswamy Sathyanarayanan
2021-03-18 20:16 ` [PATCH v13 0/5] Simplify PCIe native ownership Kuppuswamy, Sathyanarayanan
5 siblings, 0 replies; 7+ messages in thread
From: Kuppuswamy Sathyanarayanan @ 2021-01-23 1:11 UTC (permalink / raw)
To: bhelgaas; +Cc: linux-pci, linux-kernel, ashok.raj, sathyanarayanan.kuppuswamy
If the user booted with "pcie_ports=native", we take control of the PCIe
features unconditionally, regardless of what _OSC says.
Centralize the testing of pcie_ports_native in acpi_pci_root_create(),
where we interpret the _OSC results, so other places only have to check
host_bridge->native_X and we don't have to sprinkle tests of
pcie_ports_native everywhere.
[bhelgaas: commit log, rework OSC_PCI_EXPRESS_CONTROL_MASKS, logging]
Link: https://lore.kernel.org/r/bc87c9e675118960949043a832bed86bc22becbd.1603766889.git.sathyanarayanan.kuppuswamy@linux.intel.com
Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
drivers/acpi/pci_root.c | 19 +++++++++++++++++++
drivers/pci/hotplug/pciehp_core.c | 2 +-
drivers/pci/pci-acpi.c | 3 ---
drivers/pci/pcie/aer.c | 2 +-
drivers/pci/pcie/portdrv_core.c | 11 ++++-------
5 files changed, 25 insertions(+), 12 deletions(-)
diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
index 601fbe905993..16ca58d58fef 100644
--- a/drivers/acpi/pci_root.c
+++ b/drivers/acpi/pci_root.c
@@ -880,6 +880,8 @@ static void acpi_pci_root_release_info(struct pci_host_bridge *bridge)
flag = 0; \
} while (0)
+#define FLAG(x) ((x) ? '+' : '-')
+
struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
struct acpi_pci_root_ops *ops,
struct acpi_pci_root_info *info,
@@ -928,6 +930,23 @@ struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
OSC_OWNER(ctrl, OSC_PCI_EXPRESS_LTR_CONTROL, host_bridge->native_ltr);
OSC_OWNER(ctrl, OSC_PCI_EXPRESS_DPC_CONTROL, host_bridge->native_dpc);
+ if (pcie_ports_native) {
+ dev_info(&root->device->dev, "Taking control of PCIe-related features because \"pcie_ports=native\" specified; may conflict with firmware\n");
+ host_bridge->native_pcie_hotplug = 1;
+ host_bridge->native_aer = 1;
+ host_bridge->native_pme = 1;
+ host_bridge->native_ltr = 1;
+ host_bridge->native_dpc = 1;
+ }
+
+ dev_info(&root->device->dev, "OS native features: SHPCHotplug%c PCIeHotplug%c PME%c AER%c DPC%c LTR%c\n",
+ FLAG(host_bridge->native_shpc_hotplug),
+ FLAG(host_bridge->native_pcie_hotplug),
+ FLAG(host_bridge->native_pme),
+ FLAG(host_bridge->native_aer),
+ FLAG(host_bridge->native_dpc),
+ FLAG(host_bridge->native_ltr));
+
/*
* Evaluate the "PCI Boot Configuration" _DSM Function. If it
* exists and returns 0, we must preserve any PCI resource
diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c
index ad3393930ecb..d1831e6bf60a 100644
--- a/drivers/pci/hotplug/pciehp_core.c
+++ b/drivers/pci/hotplug/pciehp_core.c
@@ -256,7 +256,7 @@ static bool pme_is_native(struct pcie_device *dev)
const struct pci_host_bridge *host;
host = pci_find_host_bridge(dev->port->bus);
- return pcie_ports_native || host->native_pme;
+ return host->native_pme;
}
static void pciehp_disable_interrupt(struct pcie_device *dev)
diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c
index 53502a751914..f6327cf0601b 100644
--- a/drivers/pci/pci-acpi.c
+++ b/drivers/pci/pci-acpi.c
@@ -800,9 +800,6 @@ bool pciehp_is_native(struct pci_dev *bridge)
if (!(slot_cap & PCI_EXP_SLTCAP_HPC))
return false;
- if (pcie_ports_native)
- return true;
-
host = pci_find_host_bridge(bridge->bus);
return host->native_pcie_hotplug;
}
diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
index 77b0f2c45bc0..7fdeaadc40fe 100644
--- a/drivers/pci/pcie/aer.c
+++ b/drivers/pci/pcie/aer.c
@@ -219,7 +219,7 @@ int pcie_aer_is_native(struct pci_dev *dev)
if (!dev->aer_cap)
return 0;
- return pcie_ports_native || host->native_aer;
+ return host->native_aer;
}
int pci_enable_pcie_error_reporting(struct pci_dev *dev)
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
index e1fed6649c41..ea1099908d5d 100644
--- a/drivers/pci/pcie/portdrv_core.c
+++ b/drivers/pci/pcie/portdrv_core.c
@@ -208,8 +208,7 @@ static int get_port_device_capability(struct pci_dev *dev)
struct pci_host_bridge *host = pci_find_host_bridge(dev->bus);
int services = 0;
- if (dev->is_hotplug_bridge &&
- (pcie_ports_native || host->native_pcie_hotplug)) {
+ if (host->native_pcie_hotplug && dev->is_hotplug_bridge) {
services |= PCIE_PORT_SERVICE_HP;
/*
@@ -221,8 +220,7 @@ static int get_port_device_capability(struct pci_dev *dev)
}
#ifdef CONFIG_PCIEAER
- if (dev->aer_cap && pci_aer_available() &&
- (pcie_ports_native || host->native_aer)) {
+ if (host->native_aer && dev->aer_cap && pci_aer_available()) {
services |= PCIE_PORT_SERVICE_AER;
/*
@@ -234,9 +232,8 @@ static int get_port_device_capability(struct pci_dev *dev)
#endif
/* Root Ports and Root Complex Event Collectors may generate PMEs */
- if ((pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT ||
- pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC) &&
- (pcie_ports_native || host->native_pme)) {
+ if (host->native_pme && (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT ||
+ pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC)) {
services |= PCIE_PORT_SERVICE_PME;
/*
--
2.25.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v13 5/5] PCI/ACPI: Centralize pci_aer_available() checking
2021-01-23 1:11 [PATCH v13 0/5] Simplify PCIe native ownership Kuppuswamy Sathyanarayanan
` (3 preceding siblings ...)
2021-01-23 1:11 ` [PATCH v13 4/5] PCI/ACPI: Centralize pcie_ports_native checking Kuppuswamy Sathyanarayanan
@ 2021-01-23 1:11 ` Kuppuswamy Sathyanarayanan
2021-03-18 20:16 ` [PATCH v13 0/5] Simplify PCIe native ownership Kuppuswamy, Sathyanarayanan
5 siblings, 0 replies; 7+ messages in thread
From: Kuppuswamy Sathyanarayanan @ 2021-01-23 1:11 UTC (permalink / raw)
To: bhelgaas; +Cc: linux-pci, linux-kernel, ashok.raj, sathyanarayanan.kuppuswamy
From: Bjorn Helgaas <bhelgaas@google.com>
Check pci_aer_available() in acpi_pci_root_create() when we're interpreting
_OSC results so host_bridge->native_aer becomes the single way to determine
whether we control AER capabilities.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
drivers/acpi/pci_root.c | 3 +++
drivers/pci/pcie/portdrv_core.c | 2 +-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
index 16ca58d58fef..f7d2eed3975c 100644
--- a/drivers/acpi/pci_root.c
+++ b/drivers/acpi/pci_root.c
@@ -939,6 +939,9 @@ struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
host_bridge->native_dpc = 1;
}
+ if (!pci_aer_available())
+ host_bridge->native_aer = 0;
+
dev_info(&root->device->dev, "OS native features: SHPCHotplug%c PCIeHotplug%c PME%c AER%c DPC%c LTR%c\n",
FLAG(host_bridge->native_shpc_hotplug),
FLAG(host_bridge->native_pcie_hotplug),
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
index ea1099908d5d..a2b8a4bc91fa 100644
--- a/drivers/pci/pcie/portdrv_core.c
+++ b/drivers/pci/pcie/portdrv_core.c
@@ -220,7 +220,7 @@ static int get_port_device_capability(struct pci_dev *dev)
}
#ifdef CONFIG_PCIEAER
- if (host->native_aer && dev->aer_cap && pci_aer_available()) {
+ if (host->native_aer && dev->aer_cap) {
services |= PCIE_PORT_SERVICE_AER;
/*
--
2.25.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v13 0/5] Simplify PCIe native ownership
2021-01-23 1:11 [PATCH v13 0/5] Simplify PCIe native ownership Kuppuswamy Sathyanarayanan
` (4 preceding siblings ...)
2021-01-23 1:11 ` [PATCH v13 5/5] PCI/ACPI: Centralize pci_aer_available() checking Kuppuswamy Sathyanarayanan
@ 2021-03-18 20:16 ` Kuppuswamy, Sathyanarayanan
5 siblings, 0 replies; 7+ messages in thread
From: Kuppuswamy, Sathyanarayanan @ 2021-03-18 20:16 UTC (permalink / raw)
To: bhelgaas; +Cc: linux-pci, linux-kernel, ashok.raj
Hi Bjorn,
On 1/22/21 5:11 PM, Kuppuswamy Sathyanarayanan wrote:
> Currently, PCIe capabilities ownership status is detected by
> verifying the status of pcie_ports_native, and _OSC negotiated
> results (cached in struct pci_host_bridge->native_* members).
> But this logic can be simplified, and we can use only struct
> pci_host_bridge ->native_* members to detect it.
>
> This patchset removes the distributed checks for pcie_ports_native,
> parameter.
Any comments on this patch set?
>
> Changes since v12:
> * Rebased on top of v5.11-rc1
>
> Changes since v11 (Bjorns update):
> * Add bugfix for DPC with no AER Capability
> * Split OSC_OWNER trivial changes from pcie_ports_native changes
> * Temporarily drop pcie_ports_dpc_native changes (revisit it later).
>
> Changes since v10:
> * Addressed format issue reported by lkp test.
>
> Changes since v9:
> * Rebased on top of v5.10-rc1
>
> Changes since v8:
> * Simplified setting _OSC ownwership logic
> * Moved bridge->native_ltr out of #ifdef CONFIG_PCIEPORTBUS.
>
> Changes since v7:
> * Fixed "fix array_size.cocci warnings".
>
> Changes since v6:
> * Created new patch for CONFIG_PCIEPORTBUS check in
> pci_init_host_bridge().
> * Added warning message for a case when pcie_ports_native
> overrides _OSC negotiation result.
>
> Changes since v5:
> * Rebased on top of v5.8-rc1
>
> Changes since v4:
> * Changed the patch set title (Original link: https://lkml.org/lkml/2020/5/26/1710)
> * Added AER/DPC dependency logic cleanup fixes.
>
> Bjorn Helgaas (2):
> PCI/DPC: Ignore devices with no AER Capability
> PCI/ACPI: Centralize pci_aer_available() checking
>
> Kuppuswamy Sathyanarayanan (3):
> PCI: Assume control of portdrv-related features only when portdrv
> enabled
> PCI/ACPI: Tidy _OSC control bit checking
> PCI/ACPI: Centralize pcie_ports_native checking
>
> drivers/acpi/pci_root.c | 49 ++++++++++++++++++++++++-------
> drivers/pci/hotplug/pciehp_core.c | 2 +-
> drivers/pci/pci-acpi.c | 3 --
> drivers/pci/pcie/aer.c | 2 +-
> drivers/pci/pcie/dpc.c | 3 ++
> drivers/pci/pcie/portdrv_core.c | 11 +++----
> drivers/pci/probe.c | 6 ++--
> 7 files changed, 51 insertions(+), 25 deletions(-)
>
--
Sathyanarayanan Kuppuswamy
Linux Kernel Developer
^ permalink raw reply [flat|nested] 7+ messages in thread