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[86.49.35.8]) by smtp.gmail.com with ESMTPSA id g1sm2049024wrv.68.2019.10.17.03.55.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 17 Oct 2019 03:55:51 -0700 (PDT) Subject: Re: [PATCH V3 2/3] PCI: rcar: Do not abort on too many inbound dma-ranges To: Geert Uytterhoeven Cc: Rob Herring , Lorenzo Pieralisi , PCI , Geert Uytterhoeven , Wolfram Sang , "open list:MEDIA DRIVERS FOR RENESAS - FCP" , Robin Murphy References: <20190809175741.7066-1-marek.vasut@gmail.com> <20190809175741.7066-2-marek.vasut@gmail.com> <20191016150001.GA7457@e121166-lin.cambridge.arm.com> <20191016152601.GB7457@e121166-lin.cambridge.arm.com> <75fb3519-80eb-fec2-d3eb-cc1b884fef25@gmail.com> <20191016161846.GC7457@e121166-lin.cambridge.arm.com> <88099c4f-4fb4-626e-f66f-3eb8861dfb2c@gmail.com> <06d093b2-dcc2-a01f-fce0-5db0bc47325e@gmail.com> From: Marek Vasut Message-ID: Date: Thu, 17 Oct 2019 12:55:50 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.9.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On 10/17/19 9:06 AM, Geert Uytterhoeven wrote: [...] >>>>> I suppose if your intent is to use inbound windows as a poor man's >>>>> IOMMU to prevent accesses to the holes, then yes you would list them >>>>> out. But I think that's wrong and difficult to maintain. You'd also >>>>> need to deal with reserved-memory regions too. >>>> >>>> What's the problem with that? The bootloader has all that information >>>> and can patch the DT correctly. In fact, in my specific case, I have >>>> platform which can be populated with differently sized DRAM, so the >>>> holes are also dynamically calculated ; there is no one DT then, the >>>> bootloader is responsible to generate the dma-ranges accordingly. >>> >>> The problems are it doesn't work: >>> >>> Your dma-mask and offset are not going to be correct. >>> >>> You are running out of inbound windows. Your patch does nothing to >>> solve that. The solution would be merging multiple dma-ranges entries >>> to a single inbound window. We'd have to do that both for dma-mask and >>> inbound windows. The former would also have to figure out which >>> entries apply to setting up dma-mask. I'm simply suggesting just do >>> that up front and avoid any pointless splits. >> >> But then the PCI device can trigger a transaction to non-existent DRAM >> and cause undefined behavior. Surely we do not want that ? > > The PCI device will trigger transactions to memory only when instructed > to do so by Linux, right? Hence if Linux takes into account chosen/memory > and dma-ranges, there is no problem? Unless of course the remote device initiates a transfer. And if the controller is programmed such that accesses to the missing DRAM in the holes are not filtered out by the controller, then the controller will gladly let the transaction through. Do we really want to let this happen ? [...] -- Best regards, Marek Vasut