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From: Frederic Barrat <fbarrat@linux.ibm.com>
To: Dan Williams <dan.j.williams@intel.com>,
	Ben Widawsky <ben.widawsky@intel.com>
Cc: linux-cxl@vger.kernel.org, Linux PCI <linux-pci@vger.kernel.org>,
	linuxppc-dev <linuxppc-dev@lists.ozlabs.org>,
	Andrew Donnellan <ajd@linux.ibm.com>,
	Alison Schofield <alison.schofield@intel.com>,
	Ira Weiny <ira.weiny@intel.com>,
	Jonathan Cameron <Jonathan.Cameron@huawei.com>,
	Vishal Verma <vishal.l.verma@intel.com>
Subject: Re: [PATCH 7/7] ocxl: Use pci core's DVSEC functionality
Date: Wed, 22 Sep 2021 11:38:37 +0200	[thread overview]
Message-ID: <d2fd5a57-1b6f-5c96-338b-ac41073b2a4c@linux.ibm.com> (raw)
In-Reply-To: <CAPcyv4h4QHAQF+ogMvOXrkdyR5Jceo8yp7TQNN+836=v0QwdDw@mail.gmail.com>



On 22/09/2021 02:44, Dan Williams wrote:
> On Tue, Sep 21, 2021 at 3:05 PM Ben Widawsky <ben.widawsky@intel.com> wrote:
>>
>> Reduce maintenance burden of DVSEC query implementation by using the
>> centralized PCI core implementation.
>>
>> Cc: linuxppc-dev@lists.ozlabs.org
>> Cc: Frederic Barrat <fbarrat@linux.ibm.com>
>> Cc: Andrew Donnellan <ajd@linux.ibm.com>
>> Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
>> ---
>>   drivers/misc/ocxl/config.c | 13 +------------
>>   1 file changed, 1 insertion(+), 12 deletions(-)
>>
>> diff --git a/drivers/misc/ocxl/config.c b/drivers/misc/ocxl/config.c
>> index a68738f38252..e401a51596b9 100644
>> --- a/drivers/misc/ocxl/config.c
>> +++ b/drivers/misc/ocxl/config.c
>> @@ -33,18 +33,7 @@
>>
>>   static int find_dvsec(struct pci_dev *dev, int dvsec_id)
>>   {
>> -       int vsec = 0;
>> -       u16 vendor, id;
>> -
>> -       while ((vsec = pci_find_next_ext_capability(dev, vsec,
>> -                                                   OCXL_EXT_CAP_ID_DVSEC))) {
>> -               pci_read_config_word(dev, vsec + OCXL_DVSEC_VENDOR_OFFSET,
>> -                               &vendor);
>> -               pci_read_config_word(dev, vsec + OCXL_DVSEC_ID_OFFSET, &id);
>> -               if (vendor == PCI_VENDOR_ID_IBM && id == dvsec_id)
>> -                       return vsec;
>> -       }
>> -       return 0;
>> +       return pci_find_dvsec_capability(dev, PCI_VENDOR_ID_IBM, dvsec_id);
>>   }


That looks fine, thanks for spotting it. You can add this for the next 
revision:
Acked-by: Frederic Barrat <fbarrat@linux.ibm.com>



> 
> What about:
> 
> arch/powerpc/platforms/powernv/ocxl.c::find_dvsec_from_pos()
> 
> ...?  With that converted the redundant definitions below:
> 
> OCXL_EXT_CAP_ID_DVSEC
> OCXL_DVSEC_VENDOR_OFFSET
> OCXL_DVSEC_ID_OFFSET
> 
> ...can be cleaned up in favor of the core definitions.


That would be great. Are you guys willing to do it? If not, I could have 
a follow-on patch, if I don't forget :-)

Thanks,

   Fred


  reply	other threads:[~2021-09-22  9:38 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-21 22:04 [PATCH 0/7] cxl_pci refactor for reusability Ben Widawsky
2021-09-21 22:04 ` [PATCH 1/7] cxl: Convert "RBI" to enum Ben Widawsky
2021-09-21 22:04 ` [PATCH 2/7] cxl/pci: Remove dev_dbg for unknown register blocks Ben Widawsky
2021-09-21 22:04 ` [PATCH 3/7] cxl/pci: Refactor cxl_pci_setup_regs Ben Widawsky
2021-09-21 23:39   ` Dan Williams
2021-09-22  4:31     ` Ben Widawsky
2021-09-21 22:04 ` [PATCH 4/7] cxl/pci: Make more use of cxl_register_map Ben Widawsky
2021-09-21 22:04 ` [PATCH 5/7] PCI: Add pci_find_dvsec_capability to find designated VSEC Ben Widawsky
2021-09-22  9:33   ` Frederic Barrat
2021-09-21 22:04 ` [PATCH 6/7] cxl/pci: Use pci core's DVSEC functionality Ben Widawsky
2021-09-21 22:04 ` [PATCH 7/7] ocxl: " Ben Widawsky
2021-09-22  0:44   ` Dan Williams
2021-09-22  9:38     ` Frederic Barrat [this message]
2021-09-21 22:14 ` [PATCH 0/7] cxl_pci refactor for reusability Ben Widawsky
2021-09-21 22:28 ` Dan Williams
2021-09-21 23:03   ` Ben Widawsky

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