Re: [PATCH v2 0/5] PCI: qcom: rework pipe_clk/pipe_clk_src handling

[Dmitry Baryshkov <dmitry.baryshkov@linaro.org>]

On 13/04/2022 12:20, Johan Hovold wrote:
> [ Dropping tdas@codeaurora.org, which bounces. ]
> 
> On Tue, Apr 12, 2022 at 10:38:34PM +0300, Dmitry Baryshkov wrote:
>> PCIe pipe clk (and some other clocks) must be parked to the "safe"
>> source (bi_tcxo) when corresponding GDSC is turned off and on again.
>> Currently this is handcoded in the PCIe driver by reparenting the
>> gcc_pipe_N_clk_src clock.
>>
>> Instead of doing it manually, follow the approach used by
>> clk_rcg2_shared_ops and implement this parking in the enable() and
>> disable() clock operations for respective pipe clocks.
>>
>> PCIe part depends on [1].
> 
> Looks like you forgot to add the link to the prerequisite patch:
> 
> 	[1] https://lore.kernel.org/all/20220401133351.10113-1-johan+linaro@kernel.org/

yes, thank you for the correction

> 
>> Changes since v1:
>>   - Rebased on top of [1].
>>   - Removed erroneous Fixes tag from the patch 4.
>>
>> Changes since RFC:
>>   - Rework clk-regmap-mux fields. Specify safe parent as P_* value rather
>>     than specifying the register value directly
>>   - Expand commit message to the first patch to specially mention that
>>     it is required only on newer generations of Qualcomm chipsets.
> 
> Johan


-- 
With best wishes
Dmitry