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[89.176.112.137]) by smtp.gmail.com with ESMTPSA id l1sm1919066eje.12.2020.12.16.10.04.53 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 16 Dec 2020 10:04:53 -0800 (PST) Subject: Re: [PATCH] PCI: rcar: Always allocate MSI addresses in 32bit space To: Lorenzo Pieralisi Cc: linux-pci@vger.kernel.org, Bjorn Helgaas , Geert Uytterhoeven , Wolfram Sang , Yoshihiro Shimoda , linux-renesas-soc@vger.kernel.org References: <20201016120431.7062-1-marek.vasut@gmail.com> <20201210181133.GA3766@e121166-lin.cambridge.arm.com> <83135f6f-8a98-4537-0df5-91a06af07955@gmail.com> <20201214160829.GA3623@e121166-lin.cambridge.arm.com> From: Marek Vasut Message-ID: Date: Wed, 16 Dec 2020 18:49:54 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.5.1 MIME-Version: 1.0 In-Reply-To: <20201214160829.GA3623@e121166-lin.cambridge.arm.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On 12/14/20 5:08 PM, Lorenzo Pieralisi wrote: > On Sat, Dec 12, 2020 at 08:13:54PM +0100, Marek Vasut wrote: >> On 12/10/20 7:11 PM, Lorenzo Pieralisi wrote: >> >> [...] >> >>>> diff --git a/drivers/pci/controller/pcie-rcar-host.c b/drivers/pci/controller/pcie-rcar-host.c >>>> index 1194d5f3341b..ac5c7d7573a6 100644 >>>> --- a/drivers/pci/controller/pcie-rcar-host.c >>>> +++ b/drivers/pci/controller/pcie-rcar-host.c >>>> @@ -753,7 +753,7 @@ static int rcar_pcie_enable_msi(struct rcar_pcie_host *host) >>>> } >>>> /* setup MSI data target */ >>>> - msi->pages = __get_free_pages(GFP_KERNEL, 0); >>>> + msi->pages = __get_free_pages(GFP_KERNEL | GFP_DMA32, 0); >>> >>> This does not do what you want on !CONFIG_ZONE_DMA32 (ie arm LPAE). >> >> How come? I would expect GFP_DMA32 allocates a buffer below 4 GiB in any >> case. > > For ARM LPAE allocation falls back to ZONE_NORMAL that happens to work > because if there is memory > 4GB it ends up in ZONE_HIGHMEM, so this > patch should still work on ARM LPAE too. > > Regardless, thoughts above the alternative approach (that saves you > a page allocation) ? Since this is a bugfix, I would prefer it to be minimal. Also, in case there was some yet undiscovered hardware bug which would let the MSI write through, having unused memory as the MSI destination address would only lead to write into that memory -- instead of a write into some other address. Changing this to some hard-coded address (any suggestions?) can be a subsequent patch.