From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9ECE7C4363D for ; Fri, 25 Sep 2020 08:54:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1DF3821D91 for ; Fri, 25 Sep 2020 08:54:05 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="fEA++s28" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727067AbgIYIyE (ORCPT ); Fri, 25 Sep 2020 04:54:04 -0400 Received: from hqnvemgate24.nvidia.com ([216.228.121.143]:16576 "EHLO hqnvemgate24.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726990AbgIYIyE (ORCPT ); Fri, 25 Sep 2020 04:54:04 -0400 Received: from hqmail.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate24.nvidia.com (using TLS: TLSv1.2, AES256-SHA) id ; Fri, 25 Sep 2020 01:52:27 -0700 Received: from [10.26.74.254] (10.124.1.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Fri, 25 Sep 2020 08:53:48 +0000 Subject: Re: [PATCH v2 0/5] PCI: dwc: improve msi handling To: Jisheng Zhang , Kishon Vijay Abraham I , Lorenzo Pieralisi , Rob Herring , Bjorn Helgaas , Jingoo Han , Kukjin Kim , Krzysztof Kozlowski , Richard Zhu , Lucas Stach , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , "Yue Wang" , Kevin Hilman , "Neil Armstrong" , Jerome Brunet , Martin Blumenstingl , Jesper Nilsson , Gustavo Pimentel , Xiaowei Song , Binghui Wang , Andy Gross , Bjorn Andersson , Stanimir Varbanov , Pratyush Anand , Thierry Reding , Kunihiko Hayashi , Masahiro Yamada CC: , , , , , , , , , Vidya Sagar References: <20200924190421.549cb8fc@xhacker.debian> From: Jon Hunter Message-ID: Date: Fri, 25 Sep 2020 09:53:45 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20200924190421.549cb8fc@xhacker.debian> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.124.1.5] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To HQMAIL107.nvidia.com (172.20.187.13) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1601023947; bh=fWA/VvBZqbohPm2n/wszG6Dx2YqT5L4FZiRaNfHoaCY=; h=Subject:To:CC:References:From:Message-ID:Date:User-Agent: MIME-Version:In-Reply-To:Content-Type:Content-Language: Content-Transfer-Encoding:X-Originating-IP:X-ClientProxiedBy; b=fEA++s28b/AQ7mzCLkLzYFRlJF2BG2COMVrHmZ9Cjc9p5TbBFqA5BOrVtJltGemIH oSNwCyvZoGvaq8JWbamivR4JiDHJ/fbHitkOBJUyOKk7fhFokWkA1SANddNTwBcXbB rJtZyjOJgzSgh4jh1o7XcmqvLXAzSBHYcicmtJ9h9TR22K1MmS7jVQdifrj4pS6LSh CZ5NHyDgIi28TtEhytLl0KvjvjNJQH8L1ZdjBKU9CMVcbwGoJxuinK8SOz6YpIuAxo hXWH5k1Il3WIy1HCnjUYcvviC2GDIwIFEgHTYvXo7Sko+a01zKS96FQk+ozLWpbU2o blYdOUWHAkYjw== Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On 24/09/2020 12:05, Jisheng Zhang wrote: > Improve the msi code: > 1. Add proper error handling. > 2. Move dw_pcie_msi_init() from each users to designware host to solve > msi page leakage in resume path. Apologies if this is slightly off topic, but I have been meaning to ask about MSIs and PCI. On Tegra194 which uses the DWC PCI driver, whenever we hotplug CPUs we see the following warnings ... [ 79.068351] WARNING KERN IRQ70: set affinity failed(-22). [ 79.068362] WARNING KERN IRQ71: set affinity failed(-22). These interrupts are the MSIs ... 70: 0 0 0 0 0 0 0 0 PCI-MSI 134217728 Edge PCIe PME, aerdrv 71: 0 0 0 0 0 0 0 0 PCI-MSI 134742016 Edge ahci[0001:01:00.0] This caused because ... static int dw_pci_msi_set_affinity(struct irq_data *d, const struct cpumask *mask, bool force) { return -EINVAL; } Now the above is not unique to the DWC PCI host driver, it appears that most PCIe drivers also do the same. However, I am curious if there is any way to avoid the above warnings given that setting the affinity does not appear to be supported in anyway AFAICT. Cheers Jon -- nvpublic