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From: Manikanta Maddireddy <mmaddireddy@nvidia.com>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: <thierry.reding@gmail.com>, <robh+dt@kernel.org>,
	<mark.rutland@arm.com>, <jonathanh@nvidia.com>,
	<lorenzo.pieralisi@arm.com>, <vidyas@nvidia.com>,
	<linux-tegra@vger.kernel.org>, <linux-pci@vger.kernel.org>,
	<devicetree@vger.kernel.org>
Subject: Re: [PATCH V6 20/27] PCI: tegra: Disable MSI for Tegra PCIe root port
Date: Wed, 19 Jun 2019 09:25:54 +0530
Message-ID: <e06f85eb-be0c-c2a5-84a9-51aa9b8372c3@nvidia.com> (raw)
In-Reply-To: <20190618194830.GA110859@google.com>



On 19-Jun-19 1:18 AM, Bjorn Helgaas wrote:
> On Tue, Jun 18, 2019 at 11:31:59PM +0530, Manikanta Maddireddy wrote:
>> Tegra PCIe generates PME and AER events over legacy interrupt line. Disable
>> MSI to avoid service drivers registering interrupt routine over MSI IRQ
>> line.
>>
>> PME and AER interrupts registered to MSI without this change,
>> cat /proc/interrupts | grep -i pci
>> 36: 21 0 0 0 0 0 GICv2 104 Level       PCIE
>> 37: 35 0 0 0 0 0 GICv2 105 Level       Tegra PCIe MSI
>> 76: 0  0 0 0 0 0 Tegra PCIe MSI 0 Edge PCIe PME, aerdrv, PCIe BW notif
>>
>> PME and AER interrupts registered to legacy IRQ with this change,
>> cat /proc/interrupts | grep -i pci
>> 36: 33 0 0 0 0 0 GICv2 104 Level      PCIE, PCIe PME, aerdrv, PCIe BW notif
>> 37: 52 0 0 0 0 0 GICv2 105 Level      Tegra PCIe MSI
>>
>> Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
>> ---
>> V6: Replaced pcie_pme_disable_msi() with no_msi quirk
>>
>> V5: No change
>>
>> V4: No change
>>
>> V3: Corrected typo in commit log
>>
>> V2: No change
>>
>>  drivers/pci/quirks.c | 39 +++++++++++++++++++++++++++++++++++++++
>>  1 file changed, 39 insertions(+)
>>
>> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
>> index a59ad09ce911..20dcad421991 100644
>> --- a/drivers/pci/quirks.c
>> +++ b/drivers/pci/quirks.c
>> @@ -2576,6 +2576,45 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NVIDIA,
>>  			PCI_DEVICE_ID_NVIDIA_NVENET_15,
>>  			nvenet_msi_disable);
>>  
>> +/*
>> + * Tegra PCIe generates PME and AER events over legacy interrupt line.
>> + * So disable msi for Tegra PCIe root ports.
> s/msi/MSI/
>
> What's going on here?  Vidya posted a very similar patch [1] (although

This series is focused on Tegra20, Tegra30, Tegra124, Tegra210 and Tegra186,
whereas Vidya's series is focused only on Tegra194. So I didn't include
Tegra194 device IDs.

> his included nice spec citations, which you omitted), but his added
> quirks for 0x1ad0, 0x1ad1, and 0x1ad2.  You didn't include any of
> those here.
>
> Maybe Lorenzo will sort this all out, but it would make things easier
> if you and Vidya got together and integrated your patches yourselves
> so Lorenzo didn't have to worry about it.
>
> [1] https://lore.kernel.org/lkml/20190612095339.20118-3-vidyas@nvidia.com

I talked with Vidya, he will take this changes in his series if he needs
to publish another version, or else he will publish a new patch to add
quirk for legacy Tegra SOCs.

Lorenzo,
If this series is ready for integration, please drop this patch.

Manikanta

>
>> + */
>> +static void pci_quirk_nvidia_tegra_disable_rp_msi(struct pci_dev *dev)
>> +{
>> +	dev->no_msi = 1;
>> +}
>> +DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_NVIDIA, 0x0bf0,
>> +			      PCI_CLASS_BRIDGE_PCI, 8,
>> +			      pci_quirk_nvidia_tegra_disable_rp_msi);
>> +DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_NVIDIA, 0x0bf1,
>> +			      PCI_CLASS_BRIDGE_PCI, 8,
>> +			      pci_quirk_nvidia_tegra_disable_rp_msi);
>> +DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_NVIDIA, 0x0e1c,
>> +			      PCI_CLASS_BRIDGE_PCI, 8,
>> +			      pci_quirk_nvidia_tegra_disable_rp_msi);
>> +DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_NVIDIA, 0x0e1d,
>> +			      PCI_CLASS_BRIDGE_PCI, 8,
>> +			      pci_quirk_nvidia_tegra_disable_rp_msi);
>> +DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_NVIDIA, 0x0e12,
>> +			      PCI_CLASS_BRIDGE_PCI, 8,
>> +			      pci_quirk_nvidia_tegra_disable_rp_msi);
>> +DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_NVIDIA, 0x0e13,
>> +			      PCI_CLASS_BRIDGE_PCI, 8,
>> +			      pci_quirk_nvidia_tegra_disable_rp_msi);
>> +DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_NVIDIA, 0x0fae,
>> +			      PCI_CLASS_BRIDGE_PCI, 8,
>> +			      pci_quirk_nvidia_tegra_disable_rp_msi);
>> +DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_NVIDIA, 0x0faf,
>> +			      PCI_CLASS_BRIDGE_PCI, 8,
>> +			      pci_quirk_nvidia_tegra_disable_rp_msi);
>> +DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_NVIDIA, 0x10e5,
>> +			      PCI_CLASS_BRIDGE_PCI, 8,
>> +			      pci_quirk_nvidia_tegra_disable_rp_msi);
>> +DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_NVIDIA, 0x10e6,
>> +			      PCI_CLASS_BRIDGE_PCI, 8,
>> +			      pci_quirk_nvidia_tegra_disable_rp_msi);
>> +
>>  /*
>>   * Some versions of the MCP55 bridge from Nvidia have a legacy IRQ routing
>>   * config register.  This register controls the routing of legacy
>> -- 
>> 2.17.1
>>


  reply index

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-18 18:01 [PATCH V6 00/27] Enable Tegra PCIe root port features Manikanta Maddireddy
2019-06-18 18:01 ` [PATCH V6 01/27] soc/tegra: pmc: Export tegra_powergate_power_on() Manikanta Maddireddy
2019-06-18 18:01 ` [PATCH V6 02/27] PCI: tegra: Handle failure cases in tegra_pcie_power_on() Manikanta Maddireddy
2019-06-18 18:01 ` [PATCH V6 03/27] PCI: tegra: Rearrange Tegra PCIe driver functions Manikanta Maddireddy
2019-06-18 18:01 ` [PATCH V6 04/27] PCI: tegra: Mask AFI_INTR in runtime suspend Manikanta Maddireddy
2019-06-20 14:27   ` Lorenzo Pieralisi
2019-06-20 14:46     ` Manikanta Maddireddy
2019-06-18 18:01 ` [PATCH V6 05/27] PCI: tegra: Fix PCIe host power up sequence Manikanta Maddireddy
2019-06-18 18:01 ` [PATCH V6 06/27] PCI: tegra: Add PCIe Gen2 link speed support Manikanta Maddireddy
2019-06-20 14:32   ` Lorenzo Pieralisi
2019-06-20 14:57     ` Manikanta Maddireddy
2019-06-20 15:22       ` Lorenzo Pieralisi
2019-06-18 18:01 ` [PATCH V6 07/27] PCI: tegra: Advertise PCIe Advanced Error Reporting (AER) capability Manikanta Maddireddy
2019-06-18 18:01 ` [PATCH V6 08/27] PCI: tegra: Program UPHY electrical settings for Tegra210 Manikanta Maddireddy
2019-06-18 18:01 ` [PATCH V6 09/27] PCI: tegra: Enable opportunistic UpdateFC and ACK Manikanta Maddireddy
2019-06-18 18:01 ` [PATCH V6 10/27] PCI: tegra: Disable AFI dynamic clock gating Manikanta Maddireddy
2019-06-18 18:01 ` [PATCH V6 11/27] PCI: tegra: Process pending DLL transactions before entering L1 or L2 Manikanta Maddireddy
2019-06-18 18:01 ` [PATCH V6 12/27] PCI: tegra: Enable PCIe xclk clock clamping Manikanta Maddireddy
2019-06-18 18:01 ` [PATCH V6 13/27] PCI: tegra: Increase the deskew retry time Manikanta Maddireddy
2019-06-18 18:01 ` [PATCH V6 14/27] PCI: tegra: Add SW fixup for RAW violations Manikanta Maddireddy
2019-06-18 18:01 ` [PATCH V6 15/27] PCI: tegra: Update flow control timer frequency in Tegra210 Manikanta Maddireddy
2019-06-18 18:01 ` [PATCH V6 16/27] PCI: tegra: Set target speed as Gen1 before starting LTSSM Manikanta Maddireddy
2019-06-18 18:01 ` [PATCH V6 17/27] PCI: tegra: Fix PLLE power down issue due to CLKREQ# signal Manikanta Maddireddy
2019-06-18 18:01 ` [PATCH V6 18/27] PCI: tegra: Program AFI_CACHE* registers only for Tegra20 Manikanta Maddireddy
2019-06-20 16:26   ` Lorenzo Pieralisi
2019-06-20 16:35     ` Manikanta Maddireddy
2019-06-18 18:01 ` [PATCH V6 19/27] PCI: tegra: Change PRSNT_SENSE IRQ log to debug Manikanta Maddireddy
2019-06-18 18:01 ` [PATCH V6 20/27] PCI: tegra: Disable MSI for Tegra PCIe root port Manikanta Maddireddy
2019-06-18 19:48   ` Bjorn Helgaas
2019-06-19  3:55     ` Manikanta Maddireddy [this message]
2019-06-19  9:50       ` Lorenzo Pieralisi
2019-06-18 18:02 ` [PATCH V6 21/27] PCI: tegra: Add AFI_PEX2_CTRL reg offset as part of soc struct Manikanta Maddireddy
2019-06-18 18:02 ` [PATCH V6 22/27] dt-bindings: pci: tegra: Document PCIe DPD pinctrl optional prop Manikanta Maddireddy
2019-06-18 18:02 ` [PATCH V6 23/27] arm64: tegra: Add PEX DPD states as pinctrl properties Manikanta Maddireddy
2019-06-20 10:14   ` Thierry Reding
2019-06-18 18:02 ` [PATCH V6 24/27] PCI: tegra: Put PEX CLK & BIAS pads in DPD mode Manikanta Maddireddy
2019-06-18 18:02 ` [PATCH V6 25/27] PCI: Add DT binding for "reset-gpios" property Manikanta Maddireddy
2019-06-18 18:02 ` [PATCH V6 26/27] PCI: tegra: Add support for GPIO based PERST# Manikanta Maddireddy
2019-07-04 14:48   ` Jon Hunter
2019-07-04 15:29     ` Manikanta Maddireddy
2019-07-04 17:23       ` Jon Hunter
2019-06-18 18:02 ` [PATCH V6 27/27] PCI: tegra: Change link retry log level to debug Manikanta Maddireddy
2019-06-20 10:25 ` [PATCH V6 00/27] Enable Tegra PCIe root port features Thierry Reding
2019-06-20 10:53   ` Lorenzo Pieralisi
2019-06-20 11:14     ` Thierry Reding
2019-06-20 16:46 ` Lorenzo Pieralisi
2019-06-20 17:23   ` Manikanta Maddireddy

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