From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.4 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9FD4CC43603 for ; Tue, 17 Dec 2019 11:05:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 71C532064B for ; Tue, 17 Dec 2019 11:05:31 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="XNU7BsvY" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726608AbfLQLFb (ORCPT ); Tue, 17 Dec 2019 06:05:31 -0500 Received: from us-smtp-1.mimecast.com ([207.211.31.81]:51317 "EHLO us-smtp-delivery-1.mimecast.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726383AbfLQLFa (ORCPT ); Tue, 17 Dec 2019 06:05:30 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1576580729; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=mm4iGWCY3iczUepBnQaYVu5axa9a4WU8aq4/kTqrKKs=; b=XNU7BsvY1wRJo/1bYbbw2Da97ZKLKNwUy/MX599Z5dlDYQp3dZbFQK25t43uqBYmxWIq79 OQ0s2A3WxDNbVUuAJEvKsJejaeb8Wmfs0dJykyH7z3e8y2zqrHfM3ZjbKHeYV7G8h1AubI uHDXx7bF8NYccFphtfKHS10pbG8DkSY= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-177-UfeWOGhgMNO_hNvcjVNqkQ-1; Tue, 17 Dec 2019 06:05:28 -0500 X-MC-Unique: UfeWOGhgMNO_hNvcjVNqkQ-1 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 9A40710054E3; Tue, 17 Dec 2019 11:05:25 +0000 (UTC) Received: from [10.36.116.117] (ovpn-116-117.ams2.redhat.com [10.36.116.117]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 682B260BE0; Tue, 17 Dec 2019 11:05:20 +0000 (UTC) Subject: Re: [PATCH v3 03/13] iommu/arm-smmu-v3: Support platform SSID To: Jean-Philippe Brucker , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, devicetree@vger.kernel.org, iommu@lists.linux-foundation.org Cc: joro@8bytes.org, robh+dt@kernel.org, mark.rutland@arm.com, lorenzo.pieralisi@arm.com, guohanjun@huawei.com, sudeep.holla@arm.com, rjw@rjwysocki.net, lenb@kernel.org, will@kernel.org, robin.murphy@arm.com, bhelgaas@google.com, jonathan.cameron@huawei.com, zhangfei.gao@linaro.org References: <20191209180514.272727-1-jean-philippe@linaro.org> <20191209180514.272727-4-jean-philippe@linaro.org> From: Auger Eric Message-ID: Date: Tue, 17 Dec 2019 12:05:18 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.4.0 MIME-Version: 1.0 In-Reply-To: <20191209180514.272727-4-jean-philippe@linaro.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Hi Jean, On 12/9/19 7:05 PM, Jean-Philippe Brucker wrote: > For platform devices that support SubstreamID (SSID), firmware provides > the number of supported SSID bits. Restrict it to what the SMMU supports > and cache it into master->ssid_bits, which will also be used for PCI > PASID. > > Signed-off-by: Jean-Philippe Brucker > --- > drivers/iommu/arm-smmu-v3.c | 13 +++++++++++++ > drivers/iommu/of_iommu.c | 6 +++++- > include/linux/iommu.h | 2 ++ > 3 files changed, 20 insertions(+), 1 deletion(-) > > diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c > index d4e8b7f8d9f4..837b4283b4dc 100644 > --- a/drivers/iommu/arm-smmu-v3.c > +++ b/drivers/iommu/arm-smmu-v3.c > @@ -292,6 +292,12 @@ > > #define CTXDESC_CD_1_TTB0_MASK GENMASK_ULL(51, 4) > > +/* > + * When the SMMU only supports linear context descriptor tables, pick a > + * reasonable size limit (64kB). > + */ > +#define CTXDESC_LINEAR_CDMAX ilog2(SZ_64K / (CTXDESC_CD_DWORDS << 3)) > + > /* Convert between AArch64 (CPU) TCR format and SMMU CD format */ > #define ARM_SMMU_TCR2CD(tcr, fld) FIELD_PREP(CTXDESC_CD_0_TCR_##fld, \ > FIELD_GET(ARM64_TCR_##fld, tcr)) > @@ -638,6 +644,7 @@ struct arm_smmu_master { > u32 *sids; > unsigned int num_sids; > bool ats_enabled; > + unsigned int ssid_bits; > }; > > /* SMMU private data for an IOMMU domain */ > @@ -2571,6 +2578,12 @@ static int arm_smmu_add_device(struct device *dev) > } > } > > + master->ssid_bits = min(smmu->ssid_bits, fwspec->num_pasid_bits); > + > + if (!(smmu->features & ARM_SMMU_FEAT_2_LVL_CDTAB)) > + master->ssid_bits = min_t(u8, master->ssid_bits, > + CTXDESC_LINEAR_CDMAX); > + > group = iommu_group_get_for_dev(dev); > if (!IS_ERR(group)) { > iommu_group_put(group); > diff --git a/drivers/iommu/of_iommu.c b/drivers/iommu/of_iommu.c > index 026ad2b29dcd..b3ccb2f7f1c7 100644 > --- a/drivers/iommu/of_iommu.c > +++ b/drivers/iommu/of_iommu.c > @@ -196,8 +196,12 @@ const struct iommu_ops *of_iommu_configure(struct device *dev, > if (err) > break; > } > - } > > + fwspec = dev_iommu_fwspec_get(dev); > + if (!err && fwspec) > + of_property_read_u32(master_np, "pasid-num-bits", > + &fwspec->num_pasid_bits); > + } This patch dedicates to platform devices however I fail to understand, at that stage, how/when do you retrieve/store the same max capability for PCI devices? > > /* > * Two success conditions can be represented by non-negative err here: > diff --git a/include/linux/iommu.h b/include/linux/iommu.h > index 3a113c5d7394..bd46775c3329 100644 > --- a/include/linux/iommu.h > +++ b/include/linux/iommu.h > @@ -581,6 +581,7 @@ struct iommu_group *fsl_mc_device_group(struct device *dev); > * @ops: ops for this device's IOMMU > * @iommu_fwnode: firmware handle for this device's IOMMU > * @iommu_priv: IOMMU driver private data for this device > + * @num_pasid_bits: number of PASID bits supported by this device > * @num_ids: number of associated device IDs > * @ids: IDs which this device may present to the IOMMU > */ > @@ -589,6 +590,7 @@ struct iommu_fwspec { > struct fwnode_handle *iommu_fwnode; > void *iommu_priv; > u32 flags; > + u32 num_pasid_bits; > unsigned int num_ids; > u32 ids[1]; > }; > Besides, Reviewed-by: Eric Auger Thanks Eric