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Subject: Re: [PATCH v9 0/8] Add support for HiSilicon PCIe Tune and Trace
 device
To:     Greg KH <gregkh@linuxfoundation.org>
References: <20220606115555.41103-1-yangyicong@hisilicon.com>
 <af6723f1-c0c5-8af5-857c-af9280e705af@huawei.com>
 <Yrms2cI05O2yZRKU@kroah.com>
From:   Yicong Yang <yangyicong@huawei.com>
Message-ID: <e737393a-56dd-7d24-33d3-e935b14ba758@huawei.com>
Date:   Mon, 27 Jun 2022 21:25:42 +0800
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On 2022/6/27 21:12, Greg KH wrote:
> On Mon, Jun 27, 2022 at 07:18:12PM +0800, Yicong Yang wrote:
>> Hi Greg,
>>
>> Since the kernel side of this device has been reviewed for 8 versions with
>> all comments addressed and no more comment since v9 posted in 5.19-rc1,
>> is it ok to merge it first (for Patch 1-3 and 7-8)?
> 
> I am not the maintainer of this subsystem, so I do not understand why
> you are asking me :(
> 

I checked the log of drivers/hwtracing and seems patches of coresight/intel_th/stm
applied by different maintainers and I see you applied some patches of intel_th/stm.
Should any of these three maintainers or you can help applied this?

Thanks.