* [PATCH v2 0/2] Add PGR response PASID requirement check in Intel IOMMU. @ 2019-02-11 21:50 sathyanarayanan.kuppuswamy 2019-02-11 21:50 ` [PATCH v2 1/2] PCI/ATS: Add pci_prg_resp_pasid_required() interface sathyanarayanan.kuppuswamy 2019-02-11 21:50 ` [PATCH v2 2/2] iommu/vt-d: Enable PASID only if device expects PASID in PRG Response sathyanarayanan.kuppuswamy 0 siblings, 2 replies; 7+ messages in thread From: sathyanarayanan.kuppuswamy @ 2019-02-11 21:50 UTC (permalink / raw) To: bhelgaas, joro, dwmw2 Cc: linux-pci, iommu, linux-kernel, ashok.raj, jacob.jun.pan, keith.busch From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Intel IOMMU responds automatically when receiving page-requests from a PCIe endpoint and the page-request queue is full and it cannot accept any more page-requests. When it auto-responds to page-requests with a success to the endpoint, it automatically responds with the PASID if the page-request had a PASID in the incoming request. IOMMU doesn't actually have any place to check device capabilities (like whether the device expects PASID in PGR response or not) before sending the response message. Due to this restriction Intel IOMMU driver only enables PASID, if the endpoint is compliant to Intel IOMMU's. Changes since v1: * Changed interface name to pci_prg_resp_pasid_required(). * Update comment header format. Kuppuswamy Sathyanarayanan (2): PCI/ATS: Add pci_prg_resp_pasid_required() interface. iommu/vt-d: Enable PASID only if device expects PASID in PRG Response. drivers/iommu/intel-iommu.c | 3 ++- drivers/pci/ats.c | 31 +++++++++++++++++++++++++++++++ include/linux/pci-ats.h | 5 +++++ include/uapi/linux/pci_regs.h | 1 + 4 files changed, 39 insertions(+), 1 deletion(-) -- 2.20.1 ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v2 1/2] PCI/ATS: Add pci_prg_resp_pasid_required() interface. 2019-02-11 21:50 [PATCH v2 0/2] Add PGR response PASID requirement check in Intel IOMMU sathyanarayanan.kuppuswamy @ 2019-02-11 21:50 ` sathyanarayanan.kuppuswamy 2019-02-13 19:49 ` Bjorn Helgaas 2019-02-11 21:50 ` [PATCH v2 2/2] iommu/vt-d: Enable PASID only if device expects PASID in PRG Response sathyanarayanan.kuppuswamy 1 sibling, 1 reply; 7+ messages in thread From: sathyanarayanan.kuppuswamy @ 2019-02-11 21:50 UTC (permalink / raw) To: bhelgaas, joro, dwmw2 Cc: linux-pci, iommu, linux-kernel, ashok.raj, jacob.jun.pan, keith.busch, Jacob Pan, Kuppuswamy Sathyanarayanan From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Return the PRG Response PASID Required bit in the Page Request Status Register. As per PCIe spec r4.0, sec 10.5.2.3, if this bit is Set then the device expects a PASID TLP Prefix on PRG Response Messages when the corresponding Page Requests had a PASID TLP Prefix. If Clear, the device does not expect PASID TLP Prefixes on any PRG Response Message, and the device behavior is undefined if this bit is Clear and the device receives a PRG Response Message with a PASID TLP Prefix. Also the device behavior is undefined in the this bit is Set and the device receives a PRG Response Message with no PASID TLP Prefix when the corresponding Page Requests had a PASID TLP Prefix. This function will be used by drivers like IOMMU, if it is required to check the status of the PRG Response PASID Required bit before enabling the PASID support of the device. Cc: Ashok Raj <ashok.raj@intel.com> Cc: Jacob Pan <jacob.jun.pan@linux.intel.com> Cc: Keith Busch <keith.busch@intel.com> Suggested-by: Ashok Raj <ashok.raj@intel.com> Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> --- drivers/pci/ats.c | 31 +++++++++++++++++++++++++++++++ include/linux/pci-ats.h | 5 +++++ include/uapi/linux/pci_regs.h | 1 + 3 files changed, 37 insertions(+) diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c index 5b78f3b1b918..f843cd846dff 100644 --- a/drivers/pci/ats.c +++ b/drivers/pci/ats.c @@ -368,6 +368,37 @@ int pci_pasid_features(struct pci_dev *pdev) } EXPORT_SYMBOL_GPL(pci_pasid_features); +/** + * pci_prg_resp_pasid_required - Return PRG Response PASID Required bit + * status. + * @pdev: PCI device structure + * + * Returns 1 if PASID is required in PRG Response message, 0 otherwise. + * + * Even though the PRG response PASID status is read from PRI status + * register, since this API will mainly be used by PASID users, this + * function is defined within #ifdef CONFIG_PCI_PASID instead of + * CONFIG_PCI_PRI. + * + */ +int pci_prg_resp_pasid_required(struct pci_dev *pdev) +{ + u16 status; + int pos; + + pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI); + if (!pos) + return 0; + + pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status); + + if (status & PCI_PRI_STATUS_PASID) + return 1; + + return 0; +} +EXPORT_SYMBOL_GPL(pci_prg_resp_pasid_required); + #define PASID_NUMBER_SHIFT 8 #define PASID_NUMBER_MASK (0x1f << PASID_NUMBER_SHIFT) /** diff --git a/include/linux/pci-ats.h b/include/linux/pci-ats.h index 7c4b8e27268c..facfd6a18fe1 100644 --- a/include/linux/pci-ats.h +++ b/include/linux/pci-ats.h @@ -40,6 +40,7 @@ void pci_disable_pasid(struct pci_dev *pdev); void pci_restore_pasid_state(struct pci_dev *pdev); int pci_pasid_features(struct pci_dev *pdev); int pci_max_pasids(struct pci_dev *pdev); +int pci_prg_resp_pasid_required(struct pci_dev *pdev); #else /* CONFIG_PCI_PASID */ @@ -66,6 +67,10 @@ static inline int pci_max_pasids(struct pci_dev *pdev) return -EINVAL; } +static int pci_prg_resp_pasid_required(struct pci_dev *pdev) +{ + return 0; +} #endif /* CONFIG_PCI_PASID */ diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h index e1e9888c85e6..898be572b010 100644 --- a/include/uapi/linux/pci_regs.h +++ b/include/uapi/linux/pci_regs.h @@ -880,6 +880,7 @@ #define PCI_PRI_STATUS_RF 0x001 /* Response Failure */ #define PCI_PRI_STATUS_UPRGI 0x002 /* Unexpected PRG index */ #define PCI_PRI_STATUS_STOPPED 0x100 /* PRI Stopped */ +#define PCI_PRI_STATUS_PASID 0x8000 /* PRG Response PASID Required */ #define PCI_PRI_MAX_REQ 0x08 /* PRI max reqs supported */ #define PCI_PRI_ALLOC_REQ 0x0c /* PRI max reqs allowed */ #define PCI_EXT_CAP_PRI_SIZEOF 16 -- 2.20.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v2 1/2] PCI/ATS: Add pci_prg_resp_pasid_required() interface. 2019-02-11 21:50 ` [PATCH v2 1/2] PCI/ATS: Add pci_prg_resp_pasid_required() interface sathyanarayanan.kuppuswamy @ 2019-02-13 19:49 ` Bjorn Helgaas 0 siblings, 0 replies; 7+ messages in thread From: Bjorn Helgaas @ 2019-02-13 19:49 UTC (permalink / raw) To: sathyanarayanan.kuppuswamy Cc: joro, dwmw2, linux-pci, iommu, linux-kernel, ashok.raj, jacob.jun.pan, keith.busch, Jacob Pan On Mon, Feb 11, 2019 at 01:50:31PM -0800, sathyanarayanan.kuppuswamy@linux.intel.com wrote: > From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> > > Return the PRG Response PASID Required bit in the Page Request > Status Register. > > As per PCIe spec r4.0, sec 10.5.2.3, if this bit is Set then the device > expects a PASID TLP Prefix on PRG Response Messages when the > corresponding Page Requests had a PASID TLP Prefix. If Clear, the device > does not expect PASID TLP Prefixes on any PRG Response Message, and the > device behavior is undefined if this bit is Clear and the device > receives a PRG Response Message with a PASID TLP Prefix. Also the device > behavior is undefined in the this bit is Set and the device receives a > PRG Response Message with no PASID TLP Prefix when the corresponding > Page Requests had a PASID TLP Prefix. s/Set then the device/Set, the device/ s/undefined if this bit is Clear and the device/undefined if the device/ s/is undefined in the this/is undefined if this/ > This function will be used by drivers like IOMMU, if it is required to > check the status of the PRG Response PASID Required bit before enabling > the PASID support of the device. > > Cc: Ashok Raj <ashok.raj@intel.com> > Cc: Jacob Pan <jacob.jun.pan@linux.intel.com> > Cc: Keith Busch <keith.busch@intel.com> > Suggested-by: Ashok Raj <ashok.raj@intel.com> > Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> With typos (also below) addressed, Acked-by: Bjorn Helgaas <bhelgaas@google.com> > --- > drivers/pci/ats.c | 31 +++++++++++++++++++++++++++++++ > include/linux/pci-ats.h | 5 +++++ > include/uapi/linux/pci_regs.h | 1 + > 3 files changed, 37 insertions(+) > > diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c > index 5b78f3b1b918..f843cd846dff 100644 > --- a/drivers/pci/ats.c > +++ b/drivers/pci/ats.c > @@ -368,6 +368,37 @@ int pci_pasid_features(struct pci_dev *pdev) > } > EXPORT_SYMBOL_GPL(pci_pasid_features); > > +/** > + * pci_prg_resp_pasid_required - Return PRG Response PASID Required bit > + * status. > + * @pdev: PCI device structure > + * > + * Returns 1 if PASID is required in PRG Response message, 0 otherwise. > + * > + * Even though the PRG response PASID status is read from PRI status > + * register, since this API will mainly be used by PASID users, this > + * function is defined within #ifdef CONFIG_PCI_PASID instead of > + * CONFIG_PCI_PRI. > + * Remove blank comment line. > + */ > +int pci_prg_resp_pasid_required(struct pci_dev *pdev) > +{ > + u16 status; > + int pos; > + > + pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI); > + if (!pos) > + return 0; > + > + pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status); > + > + if (status & PCI_PRI_STATUS_PASID) > + return 1; > + > + return 0; > +} > +EXPORT_SYMBOL_GPL(pci_prg_resp_pasid_required); > + > #define PASID_NUMBER_SHIFT 8 > #define PASID_NUMBER_MASK (0x1f << PASID_NUMBER_SHIFT) > /** > diff --git a/include/linux/pci-ats.h b/include/linux/pci-ats.h > index 7c4b8e27268c..facfd6a18fe1 100644 > --- a/include/linux/pci-ats.h > +++ b/include/linux/pci-ats.h > @@ -40,6 +40,7 @@ void pci_disable_pasid(struct pci_dev *pdev); > void pci_restore_pasid_state(struct pci_dev *pdev); > int pci_pasid_features(struct pci_dev *pdev); > int pci_max_pasids(struct pci_dev *pdev); > +int pci_prg_resp_pasid_required(struct pci_dev *pdev); > > #else /* CONFIG_PCI_PASID */ > > @@ -66,6 +67,10 @@ static inline int pci_max_pasids(struct pci_dev *pdev) > return -EINVAL; > } > > +static int pci_prg_resp_pasid_required(struct pci_dev *pdev) > +{ > + return 0; > +} > #endif /* CONFIG_PCI_PASID */ > > > diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h > index e1e9888c85e6..898be572b010 100644 > --- a/include/uapi/linux/pci_regs.h > +++ b/include/uapi/linux/pci_regs.h > @@ -880,6 +880,7 @@ > #define PCI_PRI_STATUS_RF 0x001 /* Response Failure */ > #define PCI_PRI_STATUS_UPRGI 0x002 /* Unexpected PRG index */ > #define PCI_PRI_STATUS_STOPPED 0x100 /* PRI Stopped */ > +#define PCI_PRI_STATUS_PASID 0x8000 /* PRG Response PASID Required */ > #define PCI_PRI_MAX_REQ 0x08 /* PRI max reqs supported */ > #define PCI_PRI_ALLOC_REQ 0x0c /* PRI max reqs allowed */ > #define PCI_EXT_CAP_PRI_SIZEOF 16 > -- > 2.20.1 > ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v2 2/2] iommu/vt-d: Enable PASID only if device expects PASID in PRG Response. 2019-02-11 21:50 [PATCH v2 0/2] Add PGR response PASID requirement check in Intel IOMMU sathyanarayanan.kuppuswamy 2019-02-11 21:50 ` [PATCH v2 1/2] PCI/ATS: Add pci_prg_resp_pasid_required() interface sathyanarayanan.kuppuswamy @ 2019-02-11 21:50 ` sathyanarayanan.kuppuswamy 2019-02-13 8:26 ` Tian, Kevin 1 sibling, 1 reply; 7+ messages in thread From: sathyanarayanan.kuppuswamy @ 2019-02-11 21:50 UTC (permalink / raw) To: bhelgaas, joro, dwmw2 Cc: linux-pci, iommu, linux-kernel, ashok.raj, jacob.jun.pan, keith.busch, Jacob Pan, Kuppuswamy Sathyanarayanan From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> In Intel IOMMU, if the Page Request Queue (PRQ) is full, it will automatically respond to the device with a success message as a keep alive. And when sending the success message, IOMMU will include PASID in the Response Message when the Page Request has a PASID in Request Message and It does not check against the PRG Response PASID requirement of the device before sending the response. Also, If the device receives the PRG response with PASID when its not expecting it then the device behavior is undefined. So enable PASID support only if device expects PASID in PRG response message. Cc: Ashok Raj <ashok.raj@intel.com> Cc: Jacob Pan <jacob.jun.pan@linux.intel.com> Cc: Keith Busch <keith.busch@intel.com> Suggested-by: Ashok Raj <ashok.raj@intel.com> Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> --- drivers/iommu/intel-iommu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c index 1457f931218e..af2e4a011787 100644 --- a/drivers/iommu/intel-iommu.c +++ b/drivers/iommu/intel-iommu.c @@ -1399,7 +1399,8 @@ static void iommu_enable_dev_iotlb(struct device_domain_info *info) undefined. So always enable PASID support on devices which have it, even if we can't yet know if we're ever going to use it. */ - if (info->pasid_supported && !pci_enable_pasid(pdev, info->pasid_supported & ~1)) + if (info->pasid_supported && pci_prg_resp_pasid_required(pdev) && + !pci_enable_pasid(pdev, info->pasid_supported & ~1)) info->pasid_enabled = 1; if (info->pri_supported && !pci_reset_pri(pdev) && !pci_enable_pri(pdev, 32)) -- 2.20.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* RE: [PATCH v2 2/2] iommu/vt-d: Enable PASID only if device expects PASID in PRG Response. 2019-02-11 21:50 ` [PATCH v2 2/2] iommu/vt-d: Enable PASID only if device expects PASID in PRG Response sathyanarayanan.kuppuswamy @ 2019-02-13 8:26 ` Tian, Kevin 2019-02-13 18:10 ` Raj, Ashok 2019-02-13 18:19 ` sathyanarayanan kuppuswamy 0 siblings, 2 replies; 7+ messages in thread From: Tian, Kevin @ 2019-02-13 8:26 UTC (permalink / raw) To: sathyanarayanan.kuppuswamy, bhelgaas, joro, dwmw2 Cc: Raj, Ashok, linux-pci, linux-kernel, Busch, Keith, iommu, Pan, Jacob jun > From: iommu-bounces@lists.linux-foundation.org [mailto:iommu- > bounces@lists.linux-foundation.org] On Behalf Of > sathyanarayanan.kuppuswamy@linux.intel.com > Sent: Tuesday, February 12, 2019 5:51 AM > To: bhelgaas@google.com; joro@8bytes.org; dwmw2@infradead.org > Cc: Raj, Ashok <ashok.raj@intel.com>; linux-pci@vger.kernel.org; linux- > kernel@vger.kernel.org; Busch, Keith <keith.busch@intel.com>; > iommu@lists.linux-foundation.org; Pan, Jacob jun > <jacob.jun.pan@intel.com> > Subject: [PATCH v2 2/2] iommu/vt-d: Enable PASID only if device expects > PASID in PRG Response. > > From: Kuppuswamy Sathyanarayanan > <sathyanarayanan.kuppuswamy@linux.intel.com> > > In Intel IOMMU, if the Page Request Queue (PRQ) is full, it will > automatically respond to the device with a success message as a keep > alive. And when sending the success message, IOMMU will include PASID in > the Response Message when the Page Request has a PASID in Request > Message and It does not check against the PRG Response PASID > requirement > of the device before sending the response. Also, If the device receives the > PRG response with PASID when its not expecting it then the device behavior > is undefined. So enable PASID support only if device expects PASID in PRG > response message. > > Cc: Ashok Raj <ashok.raj@intel.com> > Cc: Jacob Pan <jacob.jun.pan@linux.intel.com> > Cc: Keith Busch <keith.busch@intel.com> > Suggested-by: Ashok Raj <ashok.raj@intel.com> > Signed-off-by: Kuppuswamy Sathyanarayanan > <sathyanarayanan.kuppuswamy@linux.intel.com> > --- > drivers/iommu/intel-iommu.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c > index 1457f931218e..af2e4a011787 100644 > --- a/drivers/iommu/intel-iommu.c > +++ b/drivers/iommu/intel-iommu.c > @@ -1399,7 +1399,8 @@ static void iommu_enable_dev_iotlb(struct > device_domain_info *info) > undefined. So always enable PASID support on devices which > have it, even if we can't yet know if we're ever going to > use it. */ > - if (info->pasid_supported && !pci_enable_pasid(pdev, info- > >pasid_supported & ~1)) > + if (info->pasid_supported && pci_prg_resp_pasid_required(pdev) > && > + !pci_enable_pasid(pdev, info->pasid_supported & ~1)) > info->pasid_enabled = 1; Above logic looks problematic. As Dave commented in another thread, PRI and PASID are orthogonal capabilities. Especially with introduction of VT-d scalable mode, PASID will be used alone even w/o PRI... Why not doing the check when PRI is actually enabled? At that point you can fail the request if above condition is false. > > if (info->pri_supported && !pci_reset_pri(pdev) > && !pci_enable_pri(pdev, 32)) > -- > 2.20.1 > > _______________________________________________ > iommu mailing list > iommu@lists.linux-foundation.org > https://lists.linuxfoundation.org/mailman/listinfo/iommu ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v2 2/2] iommu/vt-d: Enable PASID only if device expects PASID in PRG Response. 2019-02-13 8:26 ` Tian, Kevin @ 2019-02-13 18:10 ` Raj, Ashok 2019-02-13 18:19 ` sathyanarayanan kuppuswamy 1 sibling, 0 replies; 7+ messages in thread From: Raj, Ashok @ 2019-02-13 18:10 UTC (permalink / raw) To: Tian, Kevin Cc: sathyanarayanan.kuppuswamy, bhelgaas, joro, dwmw2, linux-pci, linux-kernel, Busch, Keith, iommu, Pan, Jacob jun On Wed, Feb 13, 2019 at 12:26:33AM -0800, Tian, Kevin wrote: > > > > diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c > > index 1457f931218e..af2e4a011787 100644 > > --- a/drivers/iommu/intel-iommu.c > > +++ b/drivers/iommu/intel-iommu.c > > @@ -1399,7 +1399,8 @@ static void iommu_enable_dev_iotlb(struct > > device_domain_info *info) > > undefined. So always enable PASID support on devices which > > have it, even if we can't yet know if we're ever going to > > use it. */ > > - if (info->pasid_supported && !pci_enable_pasid(pdev, info- > > >pasid_supported & ~1)) > > + if (info->pasid_supported && pci_prg_resp_pasid_required(pdev) > > && > > + !pci_enable_pasid(pdev, info->pasid_supported & ~1)) > > info->pasid_enabled = 1; > > Above logic looks problematic. As Dave commented in another thread, > PRI and PASID are orthogonal capabilities. Especially with introduction > of VT-d scalable mode, PASID will be used alone even w/o PRI... > > Why not doing the check when PRI is actually enabled? At that point > you can fail the request if above condition is false. > That makes sense. ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v2 2/2] iommu/vt-d: Enable PASID only if device expects PASID in PRG Response. 2019-02-13 8:26 ` Tian, Kevin 2019-02-13 18:10 ` Raj, Ashok @ 2019-02-13 18:19 ` sathyanarayanan kuppuswamy 1 sibling, 0 replies; 7+ messages in thread From: sathyanarayanan kuppuswamy @ 2019-02-13 18:19 UTC (permalink / raw) To: Tian, Kevin, bhelgaas, joro, dwmw2 Cc: Raj, Ashok, linux-pci, linux-kernel, Busch, Keith, iommu, Pan, Jacob jun On 2/13/19 12:26 AM, Tian, Kevin wrote: >> From: iommu-bounces@lists.linux-foundation.org [mailto:iommu- >> bounces@lists.linux-foundation.org] On Behalf Of >> sathyanarayanan.kuppuswamy@linux.intel.com >> Sent: Tuesday, February 12, 2019 5:51 AM >> To: bhelgaas@google.com; joro@8bytes.org; dwmw2@infradead.org >> Cc: Raj, Ashok <ashok.raj@intel.com>; linux-pci@vger.kernel.org; linux- >> kernel@vger.kernel.org; Busch, Keith <keith.busch@intel.com>; >> iommu@lists.linux-foundation.org; Pan, Jacob jun >> <jacob.jun.pan@intel.com> >> Subject: [PATCH v2 2/2] iommu/vt-d: Enable PASID only if device expects >> PASID in PRG Response. >> >> From: Kuppuswamy Sathyanarayanan >> <sathyanarayanan.kuppuswamy@linux.intel.com> >> >> In Intel IOMMU, if the Page Request Queue (PRQ) is full, it will >> automatically respond to the device with a success message as a keep >> alive. And when sending the success message, IOMMU will include PASID in >> the Response Message when the Page Request has a PASID in Request >> Message and It does not check against the PRG Response PASID >> requirement >> of the device before sending the response. Also, If the device receives the >> PRG response with PASID when its not expecting it then the device behavior >> is undefined. So enable PASID support only if device expects PASID in PRG >> response message. >> >> Cc: Ashok Raj <ashok.raj@intel.com> >> Cc: Jacob Pan <jacob.jun.pan@linux.intel.com> >> Cc: Keith Busch <keith.busch@intel.com> >> Suggested-by: Ashok Raj <ashok.raj@intel.com> >> Signed-off-by: Kuppuswamy Sathyanarayanan >> <sathyanarayanan.kuppuswamy@linux.intel.com> >> --- >> drivers/iommu/intel-iommu.c | 3 ++- >> 1 file changed, 2 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c >> index 1457f931218e..af2e4a011787 100644 >> --- a/drivers/iommu/intel-iommu.c >> +++ b/drivers/iommu/intel-iommu.c >> @@ -1399,7 +1399,8 @@ static void iommu_enable_dev_iotlb(struct >> device_domain_info *info) >> undefined. So always enable PASID support on devices which >> have it, even if we can't yet know if we're ever going to >> use it. */ >> - if (info->pasid_supported && !pci_enable_pasid(pdev, info- >>> pasid_supported & ~1)) >> + if (info->pasid_supported && pci_prg_resp_pasid_required(pdev) >> && >> + !pci_enable_pasid(pdev, info->pasid_supported & ~1)) >> info->pasid_enabled = 1; > Above logic looks problematic. As Dave commented in another thread, > PRI and PASID are orthogonal capabilities. Especially with introduction > of VT-d scalable mode, PASID will be used alone even w/o PRI... > > Why not doing the check when PRI is actually enabled? At that point > you can fail the request if above condition is false. yes, makes sense. I will fix it in next version. > >> if (info->pri_supported && !pci_reset_pri(pdev) >> && !pci_enable_pri(pdev, 32)) >> -- >> 2.20.1 >> >> _______________________________________________ >> iommu mailing list >> iommu@lists.linux-foundation.org >> https://lists.linuxfoundation.org/mailman/listinfo/iommu -- Sathyanarayanan Kuppuswamy Linux kernel developer ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2019-02-13 19:50 UTC | newest] Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-02-11 21:50 [PATCH v2 0/2] Add PGR response PASID requirement check in Intel IOMMU sathyanarayanan.kuppuswamy 2019-02-11 21:50 ` [PATCH v2 1/2] PCI/ATS: Add pci_prg_resp_pasid_required() interface sathyanarayanan.kuppuswamy 2019-02-13 19:49 ` Bjorn Helgaas 2019-02-11 21:50 ` [PATCH v2 2/2] iommu/vt-d: Enable PASID only if device expects PASID in PRG Response sathyanarayanan.kuppuswamy 2019-02-13 8:26 ` Tian, Kevin 2019-02-13 18:10 ` Raj, Ashok 2019-02-13 18:19 ` sathyanarayanan kuppuswamy
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