From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.4 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 89F67C00A89 for ; Tue, 3 Nov 2020 02:52:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 27C5A22265 for ; Tue, 3 Nov 2020 02:52:48 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="DGexuQjx" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726881AbgKCCwr (ORCPT ); Mon, 2 Nov 2020 21:52:47 -0500 Received: from hqnvemgate25.nvidia.com ([216.228.121.64]:16007 "EHLO hqnvemgate25.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725968AbgKCCwr (ORCPT ); Mon, 2 Nov 2020 21:52:47 -0500 Received: from hqmail.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate25.nvidia.com (using TLS: TLSv1.2, AES256-SHA) id ; Mon, 02 Nov 2020 18:52:47 -0800 Received: from [10.40.203.207] (172.20.13.39) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Tue, 3 Nov 2020 02:52:34 +0000 Subject: Re: [PATCH] PCI: dwc: fix reference leak in pex_ep_event_pex_rst_deassert To: Zhang Qilong , , , , , CC: , References: <20201102143045.142121-1-zhangqilong3@huawei.com> From: Vidya Sagar Message-ID: Date: Tue, 3 Nov 2020 08:22:29 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.3.2 MIME-Version: 1.0 In-Reply-To: <20201102143045.142121-1-zhangqilong3@huawei.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [172.20.13.39] X-ClientProxiedBy: HQMAIL107.nvidia.com (172.20.187.13) To HQMAIL107.nvidia.com (172.20.187.13) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1604371967; bh=Z7+YlFl7n1M2EaARg/7FhKF80dsOMACgR78/A/MOYUA=; h=Subject:To:CC:References:From:Message-ID:Date:User-Agent: MIME-Version:In-Reply-To:Content-Type:Content-Language: Content-Transfer-Encoding:X-Originating-IP:X-ClientProxiedBy; b=DGexuQjxmtlKoe06P6hB1rIvpHUvxLiSkq9Ji9HCVjJKYzQrLVo9/7kDza6eLzQhn JmMyL1ZhVz4QZ94Gf82amuqh/7LpyUQynLzY++AHh73MeHrgJfPLKYslqrqnFE4NoB XKfP70286j093yYrbzqZyZrPsizQlVxJxNjgjJ9ZCZURdaA7BzA3GdrcRSl/ut9OyO Pw3ZsHwITncKtWL4WukpqA43cATh3xjt7tFUgHRtCCQIYVwvZlydafR0RIjhiYkOIU hyIp3V5LWXCPfWfKHn207H1UvAdR6jjWPO5a1tsReBy3VeFBeOP3dkfNGlBL7D7Gqx tUW0RnAHiNu4w== Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On 11/2/2020 8:00 PM, Zhang Qilong wrote: > External email: Use caution opening links or attachments > > > pm_runtime_get_sync will increment pm usage counter even it > failed. Forgetting to pm_runtime_put_noidle will result in > reference leak in pex_ep_event_pex_rst_deassert, so we should > fix it. > > Fixes: c57247f940e8e ("PCI: tegra: Add support for PCIe endpoint mode in Tegra194") > Signed-off-by: Zhang Qilong > --- > drivers/pci/controller/dwc/pcie-tegra194.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c > index f920e7efe118..936510b5c649 100644 > --- a/drivers/pci/controller/dwc/pcie-tegra194.c > +++ b/drivers/pci/controller/dwc/pcie-tegra194.c > @@ -1662,6 +1662,7 @@ static void pex_ep_event_pex_rst_deassert(struct tegra_pcie_dw *pcie) > > ret = pm_runtime_get_sync(dev); > if (ret < 0) { > + pm_runtime_put_noidle(dev); Why can't we call pm_runtime_put_sync(dev) as that is what is being called in failure cases anyway further down in this API? > dev_err(dev, "Failed to get runtime sync for PCIe dev: %d\n", > ret); > return; > -- > 2.17.1 >