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Message-ID: <f0b11a226e084cee1a02f76cfe0975bba72feb00.camel@kernel.crashing.org>
Subject: Re: [PATCH] arm64: Enable PCI write-combine resources under sysfs
From:   Benjamin Herrenschmidt <benh@kernel.crashing.org>
To:     Catalin Marinas <catalin.marinas@arm.com>,
        Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc:     Will Deacon <will@kernel.org>, Jason Gunthorpe <jgg@nvidia.com>,
        Clint Sbisa <csbisa@amazon.com>, linux-pci@vger.kernel.org,
        Bjorn Helgaas <helgaas@kernel.org>,
        linux-arm-kernel@lists.infradead.org,
        Leon Romanovsky <leon@kernel.org>
Date:   Thu, 17 Sep 2020 07:29:11 +1000
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On Wed, 2020-09-16 at 18:00 +0100, Catalin Marinas wrote:
> > That we don't know but if a prefetchable BAR can't tolerate read
> > side effects this would be already a problem on eg x86 - that's
> > the best we can hope for given the current PCI specs.
> > 
> > +1 on normal NC. The only open point is whether we should make
> > arch_can_pci_mmap_wc() return false on platforms like TX2.
> 
> I lost track in this thread whether it matters. TX2 would need Device
> GRE for optimal performance but the kernel doesn't currently provide
> it anyway. We could expose a new memory type, aligned_wc ;).

Or ignore TX2 :-) Though Lorenzo has a point about making it return
false for arch_can_pci_mmap_wc() if we really care enough.

Cheers,
Ben.