From: sathyanarayanan kuppuswamy <sathyanarayanan.kuppuswamy@linux.intel.com>
To: "Patel, Mayurkumar" <mayurkumar.patel@intel.com>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>
Cc: "Busch, Keith" <keith.busch@intel.com>,
'Andy Shevchenko' <andriy.shevchenko@linux.intel.com>
Subject: Re: [PATCH v2] PCI/AER: Save and restore AER config state
Date: Wed, 7 Aug 2019 11:01:08 -0700 [thread overview]
Message-ID: <f7fb5aa1-a6dc-fe1a-9abf-ac2f99a945b3@linux.intel.com> (raw)
In-Reply-To: <92EBB4272BF81E4089A7126EC1E7B28479A895C7@IRSMSX101.ger.corp.intel.com>
Hi,
On 8/7/19 9:03 AM, Patel, Mayurkumar wrote:
> This patch provides AER config save and restore capabilities. After system
> resume AER config registers settings are lost. Not restoring AER root error
> command register bits on root port if they were set, disables generation
> of an AER interrupt reported by function as described in PCIe spec r4.0,
> sec 7.8.4.9. Moreover, AER config mask, severity and ECRC registers are
> also required to maintain same state prior to system suspend to maintain
> AER interrupts behavior.
Looks good to me
>
> Signed-off-by: Mayurkumar Patel <mayurkumar.patel@intel.com>
> Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
> ---
> drivers/pci/pci.c | 2 ++
> drivers/pci/pcie/aer.c | 70 ++++++++++++++++++++++++++++++++++++++++++++++++++
> include/linux/aer.h | 4 +++
> 3 files changed, 76 insertions(+)
>
> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> index 8abc843..40d5507 100644
> --- a/drivers/pci/pci.c
> +++ b/drivers/pci/pci.c
> @@ -1340,6 +1340,7 @@ int pci_save_state(struct pci_dev *dev)
>
> pci_save_ltr_state(dev);
> pci_save_dpc_state(dev);
> + pci_save_aer_state(dev);
> return pci_save_vc_state(dev);
> }
> EXPORT_SYMBOL(pci_save_state);
> @@ -1453,6 +1454,7 @@ void pci_restore_state(struct pci_dev *dev)
> pci_restore_dpc_state(dev);
>
> pci_cleanup_aer_error_status_regs(dev);
> + pci_restore_aer_state(dev);
>
> pci_restore_config_space(dev);
>
> diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
> index b45bc47..fb067dc 100644
> --- a/drivers/pci/pcie/aer.c
> +++ b/drivers/pci/pcie/aer.c
> @@ -448,6 +448,64 @@ int pci_cleanup_aer_error_status_regs(struct pci_dev *dev)
> return 0;
> }
>
> +static inline bool pcie_aer_cap_has_root_command(struct pci_dev *dev)
> +{
> + return pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT ||
> + pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC;
> +}
> +
> +void pci_save_aer_state(struct pci_dev *dev)
> +{
> + struct pci_cap_saved_state *save_state;
> + u32 *cap;
> + int pos;
> +
> + if (!pci_is_pcie(dev))
> + return;
> +
> + save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_ERR);
> + if (!save_state)
> + return;
> +
> + pos = dev->aer_cap;
> + if (!pos)
> + return;
> +
> + cap = &save_state->cap.data[0];
> + pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_MASK, cap++);
> + pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, cap++);
> + pci_read_config_dword(dev, pos + PCI_ERR_COR_MASK, cap++);
> + pci_read_config_dword(dev, pos + PCI_ERR_CAP, cap++);
> + if (pcie_aer_cap_has_root_command(dev))
> + pci_read_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, cap++);
> +}
> +
> +void pci_restore_aer_state(struct pci_dev *dev)
> +{
> + struct pci_cap_saved_state *save_state;
> + u32 *cap;
> + int pos;
> +
> + if (!pci_is_pcie(dev))
> + return;
> +
> + save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_ERR);
> + if (!save_state)
> + return;
> +
> + pos = dev->aer_cap;
> + if (!pos)
> + return;
> +
> + cap = &save_state->cap.data[0];
> + pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_MASK, *cap++);
> + pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, *cap++);
> + pci_write_config_dword(dev, pos + PCI_ERR_COR_MASK, *cap++);
> + pci_write_config_dword(dev, pos + PCI_ERR_CAP, *cap++);
> + if (pcie_aer_cap_has_root_command(dev))
> + pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, *cap++);
> +}
> +
> void pci_aer_init(struct pci_dev *dev)
> {
> dev->aer_cap = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
> @@ -455,6 +513,18 @@ void pci_aer_init(struct pci_dev *dev)
> if (dev->aer_cap)
> dev->aer_stats = kzalloc(sizeof(struct aer_stats), GFP_KERNEL);
>
> + /*
> + * Since PCI_ERR_ROOT_COMMAND is only valid for root port and root
> + * complex event collector, as per PCIe 4.0 section 7.8.4, interpret
> + * the device/port type to determine the availability of additional
> + * root port and root complex event collector register.
> + */
> + if (pcie_aer_cap_has_root_command(dev))
> + pci_add_ext_cap_save_buffer(dev, PCI_EXT_CAP_ID_ERR,
> + sizeof(u32) * 5);
> + else
> + pci_add_ext_cap_save_buffer(dev, PCI_EXT_CAP_ID_ERR,
> + sizeof(u32) * 4);
> pci_cleanup_aer_error_status_regs(dev);
> }
>
> diff --git a/include/linux/aer.h b/include/linux/aer.h
> index 514bffa..fa19e01 100644
> --- a/include/linux/aer.h
> +++ b/include/linux/aer.h
> @@ -46,6 +46,8 @@ int pci_enable_pcie_error_reporting(struct pci_dev *dev);
> int pci_disable_pcie_error_reporting(struct pci_dev *dev);
> int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev);
> int pci_cleanup_aer_error_status_regs(struct pci_dev *dev);
> +void pci_save_aer_state(struct pci_dev *dev);
> +void pci_restore_aer_state(struct pci_dev *dev);
> #else
> static inline int pci_enable_pcie_error_reporting(struct pci_dev *dev)
> {
> @@ -63,6 +65,8 @@ static inline int pci_cleanup_aer_error_status_regs(struct pci_dev *dev)
> {
> return -EINVAL;
> }
> +static inline void pci_save_aer_state(struct pci_dev *dev) {}
> +static inline void pci_restore_aer_state(struct pci_dev *dev) {}
> #endif
>
> void cper_print_aer(struct pci_dev *dev, int aer_severity,
--
Sathyanarayanan Kuppuswamy
Linux kernel developer
next prev parent reply other threads:[~2019-08-07 18:03 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-07 16:03 [PATCH v2] PCI/AER: Save and restore AER config state Patel, Mayurkumar
2019-08-07 18:01 ` sathyanarayanan kuppuswamy [this message]
2019-08-08 10:01 ` 'Andy Shevchenko'
2019-09-09 8:52 ` Patel, Mayurkumar
2019-10-04 20:36 ` Bjorn Helgaas
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=f7fb5aa1-a6dc-fe1a-9abf-ac2f99a945b3@linux.intel.com \
--to=sathyanarayanan.kuppuswamy@linux.intel.com \
--cc=andriy.shevchenko@linux.intel.com \
--cc=keith.busch@intel.com \
--cc=linux-pci@vger.kernel.org \
--cc=mayurkumar.patel@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).