From: Palmer Dabbelt <palmer@dabbelt.com>
To: greentime.hu@sifive.com
Cc: sboyd@kernel.org, alex.dewar90@gmail.com, aou@eecs.berkeley.edu,
bhelgaas@google.com, devicetree@vger.kernel.org,
erik.danie@sifive.com, hayashi.kunihiko@socionext.com,
helgaas@kernel.org, hes@sifive.com, jh80.chung@samsung.com,
khilman@baylibre.com, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
linux-riscv@lists.infradead.org, lorenzo.pieralisi@arm.com,
mturquette@baylibre.com, p.zabel@pengutronix.de,
Paul Walmsley <paul.walmsley@sifive.com>,
robh+dt@kernel.org, vidyas@nvidia.com, zong.li@sifive.com
Subject: Re: [PATCH v2 2/6] clk: sifive: Use reset-simple in prci driver for PCIe driver
Date: Tue, 30 Mar 2021 17:24:25 -0700 (PDT) [thread overview]
Message-ID: <mhng-78a4de2c-8723-4b35-b64e-2e1866ad6743@palmerdabbelt-glaptop> (raw)
In-Reply-To: <CAHCEehL63aJQPA3DdRCa3pZHWX3DH9ktgKbo1+nD=KWxADsogA@mail.gmail.com>
On Mon, 29 Mar 2021 20:36:12 PDT (-0700), greentime.hu@sifive.com wrote:
> Stephen Boyd <sboyd@kernel.org> 於 2021年3月30日 週二 上午3:14寫道：
>>
>> Quoting Greentime Hu (2021-03-17 23:08:09)
>> > diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
>> > index 71ab75a46491..f094df93d911 100644
>> > --- a/drivers/reset/Kconfig
>> > +++ b/drivers/reset/Kconfig
>> > @@ -173,7 +173,7 @@ config RESET_SCMI
>> >
>> > config RESET_SIMPLE
>> > bool "Simple Reset Controller Driver" if COMPILE_TEST
>> > - default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC
>> > + default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC || RISCV
>>
>> This conflicts. Can this default be part of the riscv defconfig instead?
>>
>
> Maybe I should remove this since it has been selected by CLK_SIFIVE_PRCI?
>
> config CLK_SIFIVE_PRCI
> bool "PRCI driver for SiFive SoCs"
> + select RESET_CONTROLLER
> + select RESET_SIMPLE
Ya, that's better. IIRC I suggested something similar in some other
version, but I might have not actually sent the mail.
>
>> > help
>> > This enables a simple reset controller driver for reset lines that
>> > that can be asserted and deasserted by toggling bits in a contiguous,
>> > @@ -187,6 +187,7 @@ config RESET_SIMPLE
>> > - RCC reset controller in STM32 MCUs
>> > - Allwinner SoCs
>> > - ZTE's zx2967 family
>> > + - SiFive FU740 SoCs
>> >
>> > config RESET_STM32MP157
>> > bool "STM32MP157 Reset Driver" if COMPILE_TEST
next prev parent reply other threads:[~2021-03-31 0:25 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-18 6:08 [PATCH v2 0/6] Add SiFive FU740 PCIe host controller driver support Greentime Hu
2021-03-18 6:08 ` [PATCH v2 1/6] clk: sifive: Add pcie_aux clock in prci driver for PCIe driver Greentime Hu
2021-03-18 6:08 ` [PATCH v2 2/6] clk: sifive: Use reset-simple " Greentime Hu
2021-03-29 19:14 ` Stephen Boyd
2021-03-30 3:36 ` Greentime Hu
2021-03-31 0:24 ` Palmer Dabbelt [this message]
2021-03-18 6:08 ` [PATCH v2 3/6] MAINTAINERS: Add maintainers for SiFive FU740 " Greentime Hu
2021-03-18 6:08 ` [PATCH v2 4/6] dt-bindings: PCI: Add SiFive FU740 PCIe host controller Greentime Hu
2021-03-19 3:56 ` Krzysztof Wilczyński
2021-03-19 21:49 ` Rob Herring
2021-03-23 20:35 ` Rob Herring
2021-03-29 3:39 ` Greentime Hu
2021-03-18 6:08 ` [PATCH v2 5/6] PCI: fu740: Add SiFive FU740 PCIe host controller driver Greentime Hu
2021-03-19 4:37 ` Krzysztof Wilczyński
2021-03-19 4:42 ` Krzysztof Wilczyński
2021-03-18 6:08 ` [PATCH v2 6/6] riscv: dts: Add PCIe support for the SiFive FU740-C000 SoC Greentime Hu
2021-03-31 0:24 ` Palmer Dabbelt
2021-04-19 2:43 ` Greentime Hu
2021-04-19 2:48 ` Greentime Hu
2021-03-29 19:12 ` [PATCH v2 0/6] Add SiFive FU740 PCIe host controller driver support Stephen Boyd
2021-04-01 6:16 ` Greentime Hu
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