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From: "Martin Mareš" <>
To: "return.0" <>
Subject: Re: pciutils: decoding extended capabilities with variable size based on lane count
Date: Sat, 13 Jul 2019 14:58:56 +0200
Message-ID: <> (raw)
In-Reply-To: <>


> I was working on providing a patch for decoding some of the 4.0 extended
> capabilities, but hit a snag.  The Lane Margining and the 16GT/S Physical
> Layer Extended Capabilities only have valid data for the number of lanes (up
> to 32) currently configured. It would be nice to know the width during
> decode without having to re-read and decode, but instead grab it from the
> device structure.

Generally, I like this approach. It however introduces a dependency between
parsing of different capabilities – so far, we did not assume any concrete
order. I think that assuming that extended caps are parsed after all
non-extended ones is OK, but please document it somewhere. Perhaps you can
add a comment to the newly added struct fields explaining when are these set
and when they are used.

				Have a nice fortnight
Martin `MJ' Mareš                        <>
United Computer Wizards, Prague, Czech Republic, Europe, Earth, Universe
A sine curve goes off to infinity or at least the end of the blackboard.

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Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-13 10:39 return.0
2019-07-13 12:58 ` Martin Mareš [this message]

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