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* [PATCH 0/5] Improve perf list support for hisi uncore PMUs
@ 2021-09-16 12:34 John Garry
  2021-09-16 12:34 ` [PATCH 1/5] perf parse-events: Set numeric term config John Garry
                   ` (4 more replies)
  0 siblings, 5 replies; 12+ messages in thread
From: John Garry @ 2021-09-16 12:34 UTC (permalink / raw)
  To: will, mathieu.poirier, leo.yan, peterz, mingo, acme,
	mark.rutland, alexander.shishkin, jolsa, namhyung
  Cc: irogers, linux-arm-kernel, linux-perf-users, linux-kernel,
	linuxarm, zhangshaokun, liuqi115, John Garry

Currently event aliases are supported for HiSilicon uncore PMUs, such that
we get events listed like the following:

$perf list
...
uncore ddrc:
  uncore_hisi_ddrc.act_cmd
       [DDRC active commands. Unit: hisi_sccl,ddrc]
  uncore_hisi_ddrc.flux_rcmd
       [DDRC read commands. Unit: hisi_sccl,ddrc]
  uncore_hisi_ddrc.flux_rd 
       [DDRC total read operations. Unit: hisi_sccl,ddrc]
  uncore_hisi_ddrc.flux_wcmd
... 

However we still get the events listed from the PMUs event files, like:

$perf list
...
  hisi_sccl1_ddrc0/act_cmd/                          [Kernel PMU event]
  hisi_sccl1_ddrc0/flux_rcmd/                        [Kernel PMU event]
  hisi_sccl1_ddrc0/flux_rd/                          [Kernel PMU event]
  hisi_sccl1_ddrc0/flux_wcmd/                        [Kernel PMU event]
  hisi_sccl1_ddrc0/flux_wr/                          [Kernel PMU event]
  hisi_sccl1_ddrc0/pre_cmd/                          [Kernel PMU event]
  hisi_sccl1_ddrc0/rnk_chg/                          [Kernel PMU event]
  hisi_sccl1_ddrc0/rw_chg/                           [Kernel PMU event]
  hisi_sccl1_ddrc1/act_cmd/                          [Kernel PMU event]
...   

The list of events will include every event for every PMU in the sysfs event
folder, so the list can be huge:

$perf list | grep hisi_scc | wc -l
783

And it will get larger for the next gen of HiSi SoCs, which has more PMUs.

Fortunately the perf PMU code can merge events when an alias with the
same name exists. So renaming the events in the JSONs to remove the
"uncore_hisi_XXX." prefix from the name to fully match the sysfs
name will mean events are merged. The list will then not show the
individual events per PMU, and rather just the aliases:

$perf list
...
uncore ddrc:
  act_cmd
       [DDRC active commands. Unit: hisi_sccl,ddrc]
  flux_rcmd
       [DDRC read commands. Unit: hisi_sccl,ddrc]
  flux_rd
       [DDRC total read operations. Unit: hisi_sccl,ddrc]
  flux_wcmd
       [DDRC write commands. Unit: hisi_sccl,ddrc]
...

To get the stat for the event, just run something like this:

$perf stat -v -e act_cmd sleep 1                
Using CPUID 0x00000000480fd010
act_cmd -> hisi_sccl1_ddrc0/config=0x5/
act_cmd -> hisi_sccl3_ddrc1/config=0x5/
act_cmd -> hisi_sccl5_ddrc2/config=0x5/
act_cmd -> hisi_sccl7_ddrc3/config=0x5/
act_cmd -> hisi_sccl5_ddrc0/config=0x5/
Control descriptor is not initialized
act_cmd: 0 1001546260 1001546260
act_cmd: 0 1001542780 1001542780
act_cmd: 0 1001531630 1001531630
act_cmd: 0 1001518570 1001518570
act_cmd: 0 1001527830 1001527830

 Performance counter stats for 'system wide':  

            48,142      act_cmd

       1.001518294 seconds time elapsed

And to run for an individual PMU, run something like this:

$perf stat -v -e hisi_sccl1_ddrc0/act_cmd/ sleep 1

hisi_sccl1_ddrc0/act_cmd/: 0 1000818310 1000818310

 Performance counter stats for 'system wide':

                 0      hisi_sccl1_ddrc0/act_cmd/

       1.000827061 seconds time elapsed

I expect that having the same event name for different types of PMUs
may give unexpected results, so best to use -v option to verify the 
PMUs used are as expected.

John Garry (5):
  perf parse-events: Set numeric term config
  perf jevents: Support ConfigCode
  perf test: Verify more event members in pmu-events test
  perf test: Add pmu-event test for event described as "config="
  perf vendor events arm64: Revise hip08 uncore events

 .../arm64/hisilicon/hip08/uncore-ddrc.json    |  32 ++---
 .../arm64/hisilicon/hip08/uncore-hha.json     | 120 +++++++++++++++---
 .../arm64/hisilicon/hip08/uncore-l3c.json     |  52 ++++----
 .../arch/test/test_soc/sys/uncore.json        |   7 +
 tools/perf/pmu-events/jevents.c               |  13 +-
 tools/perf/tests/parse-events.c               |   8 +-
 tools/perf/tests/pmu-events.c                 |  81 ++++++++++--
 tools/perf/util/parse-events.c                |   2 +-
 8 files changed, 234 insertions(+), 81 deletions(-)

-- 
2.26.2


^ permalink raw reply	[flat|nested] 12+ messages in thread

* [PATCH 1/5] perf parse-events: Set numeric term config
  2021-09-16 12:34 [PATCH 0/5] Improve perf list support for hisi uncore PMUs John Garry
@ 2021-09-16 12:34 ` John Garry
  2021-09-28 17:59   ` Ian Rogers
  2021-09-16 12:34 ` [PATCH 2/5] perf jevents: Support ConfigCode John Garry
                   ` (3 subsequent siblings)
  4 siblings, 1 reply; 12+ messages in thread
From: John Garry @ 2021-09-16 12:34 UTC (permalink / raw)
  To: will, mathieu.poirier, leo.yan, peterz, mingo, acme,
	mark.rutland, alexander.shishkin, jolsa, namhyung
  Cc: irogers, linux-arm-kernel, linux-perf-users, linux-kernel,
	linuxarm, zhangshaokun, liuqi115, John Garry

For numeric terms, the config field may be NULL as it is not set from the
l+y parsing.

Fix by setting the term config from the term type name.

Also fix up the pmu-events test to set the alias strings to set the period
term properly, and fix up parse-events test to check the term config
string.

Signed-off-by: John Garry <john.garry@huawei.com>
---
 tools/perf/tests/parse-events.c | 8 ++++----
 tools/perf/tests/pmu-events.c   | 6 +++---
 tools/perf/util/parse-events.c  | 2 +-
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/tools/perf/tests/parse-events.c b/tools/perf/tests/parse-events.c
index fd3556cc9ad4..8875e388563e 100644
--- a/tools/perf/tests/parse-events.c
+++ b/tools/perf/tests/parse-events.c
@@ -605,7 +605,7 @@ static int test__checkterms_simple(struct list_head *terms)
 	TEST_ASSERT_VAL("wrong type val",
 			term->type_val == PARSE_EVENTS__TERM_TYPE_NUM);
 	TEST_ASSERT_VAL("wrong val", term->val.num == 10);
-	TEST_ASSERT_VAL("wrong config", !term->config);
+	TEST_ASSERT_VAL("wrong config", !strcmp(term->config, "config"));
 
 	/* config1 */
 	term = list_entry(term->list.next, struct parse_events_term, list);
@@ -614,7 +614,7 @@ static int test__checkterms_simple(struct list_head *terms)
 	TEST_ASSERT_VAL("wrong type val",
 			term->type_val == PARSE_EVENTS__TERM_TYPE_NUM);
 	TEST_ASSERT_VAL("wrong val", term->val.num == 1);
-	TEST_ASSERT_VAL("wrong config", !term->config);
+	TEST_ASSERT_VAL("wrong config", !strcmp(term->config, "config1"));
 
 	/* config2=3 */
 	term = list_entry(term->list.next, struct parse_events_term, list);
@@ -623,7 +623,7 @@ static int test__checkterms_simple(struct list_head *terms)
 	TEST_ASSERT_VAL("wrong type val",
 			term->type_val == PARSE_EVENTS__TERM_TYPE_NUM);
 	TEST_ASSERT_VAL("wrong val", term->val.num == 3);
-	TEST_ASSERT_VAL("wrong config", !term->config);
+	TEST_ASSERT_VAL("wrong config", !strcmp(term->config, "config2"));
 
 	/* umask=1*/
 	term = list_entry(term->list.next, struct parse_events_term, list);
@@ -661,7 +661,7 @@ static int test__checkterms_simple(struct list_head *terms)
 	TEST_ASSERT_VAL("wrong type val",
 			term->type_val == PARSE_EVENTS__TERM_TYPE_NUM);
 	TEST_ASSERT_VAL("wrong val", term->val.num == 0xead);
-	TEST_ASSERT_VAL("wrong config", !term->config);
+	TEST_ASSERT_VAL("wrong config", !strcmp(term->config, "config"));
 	return 0;
 }
 
diff --git a/tools/perf/tests/pmu-events.c b/tools/perf/tests/pmu-events.c
index 43743cf719ef..8c5a6ba1cb14 100644
--- a/tools/perf/tests/pmu-events.c
+++ b/tools/perf/tests/pmu-events.c
@@ -67,7 +67,7 @@ static const struct perf_pmu_test_event segment_reg_loads_any = {
 		.desc = "Number of segment register loads",
 		.topic = "other",
 	},
-	.alias_str = "umask=0x80,(null)=0x30d40,event=0x6",
+	.alias_str = "umask=0x80,period=0x30d40,event=0x6",
 	.alias_long_desc = "Number of segment register loads",
 };
 
@@ -78,7 +78,7 @@ static const struct perf_pmu_test_event dispatch_blocked_any = {
 		.desc = "Memory cluster signals to block micro-op dispatch for any reason",
 		.topic = "other",
 	},
-	.alias_str = "umask=0x20,(null)=0x30d40,event=0x9",
+	.alias_str = "umask=0x20,period=0x30d40,event=0x9",
 	.alias_long_desc = "Memory cluster signals to block micro-op dispatch for any reason",
 };
 
@@ -89,7 +89,7 @@ static const struct perf_pmu_test_event eist_trans = {
 		.desc = "Number of Enhanced Intel SpeedStep(R) Technology (EIST) transitions",
 		.topic = "other",
 	},
-	.alias_str = "umask=0,(null)=0x30d40,event=0x3a",
+	.alias_str = "umask=0,period=0x30d40,event=0x3a",
 	.alias_long_desc = "Number of Enhanced Intel SpeedStep(R) Technology (EIST) transitions",
 };
 
diff --git a/tools/perf/util/parse-events.c b/tools/perf/util/parse-events.c
index 51a2219df601..e10243454e8b 100644
--- a/tools/perf/util/parse-events.c
+++ b/tools/perf/util/parse-events.c
@@ -3083,7 +3083,7 @@ int parse_events_term__num(struct parse_events_term **term,
 	struct parse_events_term temp = {
 		.type_val  = PARSE_EVENTS__TERM_TYPE_NUM,
 		.type_term = type_term,
-		.config    = config,
+		.config    = config ? : strdup(config_term_names[type_term]),
 		.no_value  = no_value,
 		.err_term  = loc_term ? loc_term->first_column : 0,
 		.err_val   = loc_val  ? loc_val->first_column  : 0,
-- 
2.26.2


^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH 2/5] perf jevents: Support ConfigCode
  2021-09-16 12:34 [PATCH 0/5] Improve perf list support for hisi uncore PMUs John Garry
  2021-09-16 12:34 ` [PATCH 1/5] perf parse-events: Set numeric term config John Garry
@ 2021-09-16 12:34 ` John Garry
  2021-09-28 18:00   ` Ian Rogers
  2021-09-16 12:34 ` [PATCH 3/5] perf test: Verify more event members in pmu-events test John Garry
                   ` (2 subsequent siblings)
  4 siblings, 1 reply; 12+ messages in thread
From: John Garry @ 2021-09-16 12:34 UTC (permalink / raw)
  To: will, mathieu.poirier, leo.yan, peterz, mingo, acme,
	mark.rutland, alexander.shishkin, jolsa, namhyung
  Cc: irogers, linux-arm-kernel, linux-perf-users, linux-kernel,
	linuxarm, zhangshaokun, liuqi115, John Garry

Some PMUs use "config=XXX" for eventcodes, like:

more /sys/bus/event_source/devices/hisi_sccl1_ddrc3/events/act_cmd
config=0x5

However jevents would give an alias with .event field "event=0x5" for this
event. This is handled without issue by the parse events code, but the pmu
alias code gets a bit confused, as it warns about assigning "event=0x5"
over "config=0x5" in perf_pmu_assign_str() when merging aliases:
./perf stat -v -e act_cmd
...
alias act_cmd differs in field 'value'
...

To make things a bit more straightforward, allow jevents to support
"config=XXX" as well, by supporting a "ConfigCode" field.

Signed-off-by: John Garry <john.garry@huawei.com>
---
 tools/perf/pmu-events/jevents.c | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c
index 6731b3cf0c2f..ef92c2fdd45d 100644
--- a/tools/perf/pmu-events/jevents.c
+++ b/tools/perf/pmu-events/jevents.c
@@ -575,10 +575,12 @@ static int json_events(const char *fn,
 		struct json_event je = {};
 		char *arch_std = NULL;
 		unsigned long long eventcode = 0;
+		unsigned long long configcode = 0;
 		struct msrmap *msr = NULL;
 		jsmntok_t *msrval = NULL;
 		jsmntok_t *precise = NULL;
 		jsmntok_t *obj = tok++;
+		bool configcode_present = false;
 
 		EXPECT(obj->type == JSMN_OBJECT, obj, "expected object");
 		for (j = 0; j < obj->size; j += 2) {
@@ -601,6 +603,12 @@ static int json_events(const char *fn,
 				addfield(map, &code, "", "", val);
 				eventcode |= strtoul(code, NULL, 0);
 				free(code);
+			} else if (json_streq(map, field, "ConfigCode")) {
+				char *code = NULL;
+				addfield(map, &code, "", "", val);
+				configcode |= strtoul(code, NULL, 0);
+				free(code);
+				configcode_present = true;
 			} else if (json_streq(map, field, "ExtSel")) {
 				char *code = NULL;
 				addfield(map, &code, "", "", val);
@@ -682,7 +690,10 @@ static int json_events(const char *fn,
 				addfield(map, &extra_desc, " ",
 						"(Precise event)", NULL);
 		}
-		snprintf(buf, sizeof buf, "event=%#llx", eventcode);
+		if (configcode_present)
+			snprintf(buf, sizeof buf, "config=%#llx", configcode);
+		else
+			snprintf(buf, sizeof buf, "event=%#llx", eventcode);
 		addfield(map, &event, ",", buf, NULL);
 		if (je.desc && extra_desc)
 			addfield(map, &je.desc, " ", extra_desc, NULL);
-- 
2.26.2


^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH 3/5] perf test: Verify more event members in pmu-events test
  2021-09-16 12:34 [PATCH 0/5] Improve perf list support for hisi uncore PMUs John Garry
  2021-09-16 12:34 ` [PATCH 1/5] perf parse-events: Set numeric term config John Garry
  2021-09-16 12:34 ` [PATCH 2/5] perf jevents: Support ConfigCode John Garry
@ 2021-09-16 12:34 ` John Garry
  2021-09-28 18:02   ` Ian Rogers
  2021-09-16 12:34 ` [PATCH 4/5] perf test: Add pmu-event test for event described as "config=" John Garry
  2021-09-16 12:34 ` [PATCH 5/5] perf vendor events arm64: Revise hip08 uncore events John Garry
  4 siblings, 1 reply; 12+ messages in thread
From: John Garry @ 2021-09-16 12:34 UTC (permalink / raw)
  To: will, mathieu.poirier, leo.yan, peterz, mingo, acme,
	mark.rutland, alexander.shishkin, jolsa, namhyung
  Cc: irogers, linux-arm-kernel, linux-perf-users, linux-kernel,
	linuxarm, zhangshaokun, liuqi115, John Garry

Function compare_pmu_events() does not compare all struct pmu-events
members, so add tests for missing members "name", "event", "aggr_mod",
"event", "metric_constraint", and "metric_group", and re-order the tests
to match current struct pmu-events member ordering.

Also fix uncore_hisi_l3c_rd_hit_cpipe.event member, now that we're actually
testing it.

Signed-off-by: John Garry <john.garry@huawei.com>
---
 tools/perf/tests/pmu-events.c | 50 ++++++++++++++++++++++++++++-------
 1 file changed, 40 insertions(+), 10 deletions(-)

diff --git a/tools/perf/tests/pmu-events.c b/tools/perf/tests/pmu-events.c
index 8c5a6ba1cb14..adfc17f51c7b 100644
--- a/tools/perf/tests/pmu-events.c
+++ b/tools/perf/tests/pmu-events.c
@@ -146,7 +146,7 @@ static const struct perf_pmu_test_event unc_cbo_xsnp_response_miss_eviction = {
 static const struct perf_pmu_test_event uncore_hisi_l3c_rd_hit_cpipe = {
 	.event = {
 		.name = "uncore_hisi_l3c.rd_hit_cpipe",
-		.event = "event=0x2",
+		.event = "event=0x7",
 		.desc = "Total read hits. Unit: hisi_sccl,l3c ",
 		.topic = "uncore",
 		.long_desc = "Total read hits",
@@ -255,6 +255,24 @@ static struct pmu_event *__test_pmu_get_sys_events_table(void)
 
 static int compare_pmu_events(struct pmu_event *e1, const struct pmu_event *e2)
 {
+	if (!is_same(e1->name, e2->name)) {
+		pr_debug2("testing event e1 %s: mismatched name string, %s vs %s\n",
+			  e1->name, e1->name, e2->name);
+		return -1;
+	}
+
+	if (!is_same(e1->compat, e2->compat)) {
+		pr_debug2("testing event e1 %s: mismatched compat string, %s vs %s\n",
+			  e1->name, e1->compat, e2->compat);
+		return -1;
+	}
+
+	if (!is_same(e1->event, e2->event)) {
+		pr_debug2("testing event e1 %s: mismatched event, %s vs %s\n",
+			  e1->name, e1->event, e2->event);
+		return -1;
+	}
+
 	if (!is_same(e1->desc, e2->desc)) {
 		pr_debug2("testing event e1 %s: mismatched desc, %s vs %s\n",
 			  e1->name, e1->desc, e2->desc);
@@ -273,6 +291,12 @@ static int compare_pmu_events(struct pmu_event *e1, const struct pmu_event *e2)
 		return -1;
 	}
 
+	if (!is_same(e1->pmu, e2->pmu)) {
+		pr_debug2("testing event e1 %s: mismatched pmu string, %s vs %s\n",
+			  e1->name, e1->pmu, e2->pmu);
+		return -1;
+	}
+
 	if (!is_same(e1->unit, e2->unit)) {
 		pr_debug2("testing event e1 %s: mismatched unit, %s vs %s\n",
 			  e1->name, e1->unit, e2->unit);
@@ -285,6 +309,12 @@ static int compare_pmu_events(struct pmu_event *e1, const struct pmu_event *e2)
 		return -1;
 	}
 
+	if (!is_same(e1->aggr_mode, e2->aggr_mode)) {
+		pr_debug2("testing event e1 %s: mismatched aggr_mode, %s vs %s\n",
+			  e1->name, e1->aggr_mode, e2->aggr_mode);
+		return -1;
+	}
+
 	if (!is_same(e1->metric_expr, e2->metric_expr)) {
 		pr_debug2("testing event e1 %s: mismatched metric_expr, %s vs %s\n",
 			  e1->name, e1->metric_expr, e2->metric_expr);
@@ -297,21 +327,21 @@ static int compare_pmu_events(struct pmu_event *e1, const struct pmu_event *e2)
 		return -1;
 	}
 
-	if (!is_same(e1->deprecated, e2->deprecated)) {
-		pr_debug2("testing event e1 %s: mismatched deprecated, %s vs %s\n",
-			  e1->name, e1->deprecated, e2->deprecated);
+	if (!is_same(e1->metric_group, e2->metric_group)) {
+		pr_debug2("testing event e1 %s: mismatched metric_group, %s vs %s\n",
+			  e1->name, e1->metric_group, e2->metric_group);
 		return -1;
 	}
 
-	if (!is_same(e1->pmu, e2->pmu)) {
-		pr_debug2("testing event e1 %s: mismatched pmu string, %s vs %s\n",
-			  e1->name, e1->pmu, e2->pmu);
+	if (!is_same(e1->deprecated, e2->deprecated)) {
+		pr_debug2("testing event e1 %s: mismatched deprecated, %s vs %s\n",
+			  e1->name, e1->deprecated, e2->deprecated);
 		return -1;
 	}
 
-	if (!is_same(e1->compat, e2->compat)) {
-		pr_debug2("testing event e1 %s: mismatched compat string, %s vs %s\n",
-			  e1->name, e1->compat, e2->compat);
+	if (!is_same(e1->metric_constraint, e2->metric_constraint)) {
+		pr_debug2("testing event e1 %s: mismatched metric_constant, %s vs %s\n",
+			  e1->name, e1->metric_constraint, e2->metric_constraint);
 		return -1;
 	}
 
-- 
2.26.2


^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH 4/5] perf test: Add pmu-event test for event described as "config="
  2021-09-16 12:34 [PATCH 0/5] Improve perf list support for hisi uncore PMUs John Garry
                   ` (2 preceding siblings ...)
  2021-09-16 12:34 ` [PATCH 3/5] perf test: Verify more event members in pmu-events test John Garry
@ 2021-09-16 12:34 ` John Garry
  2021-09-28 18:03   ` Ian Rogers
  2021-09-16 12:34 ` [PATCH 5/5] perf vendor events arm64: Revise hip08 uncore events John Garry
  4 siblings, 1 reply; 12+ messages in thread
From: John Garry @ 2021-09-16 12:34 UTC (permalink / raw)
  To: will, mathieu.poirier, leo.yan, peterz, mingo, acme,
	mark.rutland, alexander.shishkin, jolsa, namhyung
  Cc: irogers, linux-arm-kernel, linux-perf-users, linux-kernel,
	linuxarm, zhangshaokun, liuqi115, John Garry

Add a new test event for a system event whose event member is in form
"config=".

Signed-off-by: John Garry <john.garry@huawei.com>
---
 .../arch/test/test_soc/sys/uncore.json        |  7 ++++++
 tools/perf/tests/pmu-events.c                 | 25 +++++++++++++++++++
 2 files changed, 32 insertions(+)

diff --git a/tools/perf/pmu-events/arch/test/test_soc/sys/uncore.json b/tools/perf/pmu-events/arch/test/test_soc/sys/uncore.json
index 0f681a6e10ea..c7e7528db315 100644
--- a/tools/perf/pmu-events/arch/test/test_soc/sys/uncore.json
+++ b/tools/perf/pmu-events/arch/test/test_soc/sys/uncore.json
@@ -6,4 +6,11 @@
            "Unit": "sys_ddr_pmu",
            "Compat": "v8"
    },
+   {
+           "BriefDescription": "ccn read-cycles event",
+           "ConfigCode": "0x2c",
+           "EventName": "sys_ccn_pmu.read_cycles",
+           "Unit": "sys_ccn_pmu",
+           "Compat": "0x01"
+   }
 ]
diff --git a/tools/perf/tests/pmu-events.c b/tools/perf/tests/pmu-events.c
index adfc17f51c7b..f14266a4c513 100644
--- a/tools/perf/tests/pmu-events.c
+++ b/tools/perf/tests/pmu-events.c
@@ -208,8 +208,23 @@ static const struct perf_pmu_test_event sys_ddr_pmu_write_cycles = {
 	.matching_pmu = "uncore_sys_ddr_pmu",
 };
 
+static const struct perf_pmu_test_event sys_ccn_pmu_read_cycles = {
+	.event = {
+		.name = "sys_ccn_pmu.read_cycles",
+		.event = "config=0x2c",
+		.desc = "ccn read-cycles event. Unit: uncore_sys_ccn_pmu ",
+		.topic = "uncore",
+		.pmu = "uncore_sys_ccn_pmu",
+		.compat = "0x01",
+	},
+	.alias_str = "config=0x2c",
+	.alias_long_desc = "ccn read-cycles event. Unit: uncore_sys_ccn_pmu ",
+	.matching_pmu = "uncore_sys_ccn_pmu",
+};
+
 static const struct perf_pmu_test_event *sys_events[] = {
 	&sys_ddr_pmu_write_cycles,
+	&sys_ccn_pmu_read_cycles,
 	NULL
 };
 
@@ -677,6 +692,16 @@ static struct perf_pmu_test_pmu test_pmus[] = {
 			&sys_ddr_pmu_write_cycles,
 		},
 	},
+	{
+		.pmu = {
+			.name = (char *)"uncore_sys_ccn_pmu4",
+			.is_uncore = 1,
+			.id = (char *)"0x01",
+		},
+		.aliases = {
+			&sys_ccn_pmu_read_cycles,
+		},
+	},
 };
 
 /* Test that aliases generated are as expected */
-- 
2.26.2


^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH 5/5] perf vendor events arm64: Revise hip08 uncore events
  2021-09-16 12:34 [PATCH 0/5] Improve perf list support for hisi uncore PMUs John Garry
                   ` (3 preceding siblings ...)
  2021-09-16 12:34 ` [PATCH 4/5] perf test: Add pmu-event test for event described as "config=" John Garry
@ 2021-09-16 12:34 ` John Garry
  2021-09-28 18:04   ` Ian Rogers
  4 siblings, 1 reply; 12+ messages in thread
From: John Garry @ 2021-09-16 12:34 UTC (permalink / raw)
  To: will, mathieu.poirier, leo.yan, peterz, mingo, acme,
	mark.rutland, alexander.shishkin, jolsa, namhyung
  Cc: irogers, linux-arm-kernel, linux-perf-users, linux-kernel,
	linuxarm, zhangshaokun, liuqi115, John Garry

To improve alias matching, remove the PMU name prefix from the EventName.
This will mean that the pmu code will merge aliases, such that we no
longer get a huge list of per-PMU events - see perf_pmu_merge_alias().

Also make the following associated changes:
- Use "ConfigCode" rather than "EventCode", so the pmu code is not so
  disagreeable about inconsistent event codes
- Add undocumented HHA event codes to allow alias merging (for those
  events)

Signed-off-by: John Garry <john.garry@huawei.com>
---
 .../arm64/hisilicon/hip08/uncore-ddrc.json    |  32 ++---
 .../arm64/hisilicon/hip08/uncore-hha.json     | 120 +++++++++++++++---
 .../arm64/hisilicon/hip08/uncore-l3c.json     |  52 ++++----
 3 files changed, 142 insertions(+), 62 deletions(-)

diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json
index 61514d38601b..2b3cb55df288 100644
--- a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json
+++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json
@@ -1,56 +1,56 @@
 [
    {
-	    "EventCode": "0x00",
-	    "EventName": "uncore_hisi_ddrc.flux_wr",
+	    "ConfigCode": "0x00",
+	    "EventName": "flux_wr",
 	    "BriefDescription": "DDRC total write operations",
 	    "PublicDescription": "DDRC total write operations",
 	    "Unit": "hisi_sccl,ddrc"
    },
    {
-	    "EventCode": "0x01",
-	    "EventName": "uncore_hisi_ddrc.flux_rd",
+	    "ConfigCode": "0x01",
+	    "EventName": "flux_rd",
 	    "BriefDescription": "DDRC total read operations",
 	    "PublicDescription": "DDRC total read operations",
 	    "Unit": "hisi_sccl,ddrc"
    },
    {
-	    "EventCode": "0x02",
-	    "EventName": "uncore_hisi_ddrc.flux_wcmd",
+	    "ConfigCode": "0x02",
+	    "EventName": "flux_wcmd",
 	    "BriefDescription": "DDRC write commands",
 	    "PublicDescription": "DDRC write commands",
 	    "Unit": "hisi_sccl,ddrc"
    },
    {
-	    "EventCode": "0x03",
-	    "EventName": "uncore_hisi_ddrc.flux_rcmd",
+	    "ConfigCode": "0x03",
+	    "EventName": "flux_rcmd",
 	    "BriefDescription": "DDRC read commands",
 	    "PublicDescription": "DDRC read commands",
 	    "Unit": "hisi_sccl,ddrc"
    },
    {
-	    "EventCode": "0x04",
-	    "EventName": "uncore_hisi_ddrc.pre_cmd",
+	    "ConfigCode": "0x04",
+	    "EventName": "pre_cmd",
 	    "BriefDescription": "DDRC precharge commands",
 	    "PublicDescription": "DDRC precharge commands",
 	    "Unit": "hisi_sccl,ddrc"
    },
    {
-	    "EventCode": "0x05",
-	    "EventName": "uncore_hisi_ddrc.act_cmd",
+	    "ConfigCode": "0x05",
+	    "EventName": "act_cmd",
 	    "BriefDescription": "DDRC active commands",
 	    "PublicDescription": "DDRC active commands",
 	    "Unit": "hisi_sccl,ddrc"
    },
    {
-	    "EventCode": "0x06",
-	    "EventName": "uncore_hisi_ddrc.rnk_chg",
+	    "ConfigCode": "0x06",
+	    "EventName": "rnk_chg",
 	    "BriefDescription": "DDRC rank commands",
 	    "PublicDescription": "DDRC rank commands",
 	    "Unit": "hisi_sccl,ddrc"
    },
    {
-	    "EventCode": "0x07",
-	    "EventName": "uncore_hisi_ddrc.rw_chg",
+	    "ConfigCode": "0x07",
+	    "EventName": "rw_chg",
 	    "BriefDescription": "DDRC read and write changes",
 	    "PublicDescription": "DDRC read and write changes",
 	    "Unit": "hisi_sccl,ddrc"
diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json
index ada86782933f..9a7ec7af2060 100644
--- a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json
+++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json
@@ -1,72 +1,152 @@
 [
    {
-	    "EventCode": "0x00",
-	    "EventName": "uncore_hisi_hha.rx_ops_num",
+	    "ConfigCode": "0x00",
+	    "EventName": "rx_ops_num",
 	    "BriefDescription": "The number of all operations received by the HHA",
 	    "PublicDescription": "The number of all operations received by the HHA",
 	    "Unit": "hisi_sccl,hha"
    },
    {
-	    "EventCode": "0x01",
-	    "EventName": "uncore_hisi_hha.rx_outer",
+	    "ConfigCode": "0x01",
+	    "EventName": "rx_outer",
 	    "BriefDescription": "The number of all operations received by the HHA from another socket",
 	    "PublicDescription": "The number of all operations received by the HHA from another socket",
 	    "Unit": "hisi_sccl,hha"
    },
    {
-	    "EventCode": "0x02",
-	    "EventName": "uncore_hisi_hha.rx_sccl",
+	    "ConfigCode": "0x02",
+	    "EventName": "rx_sccl",
 	    "BriefDescription": "The number of all operations received by the HHA from another SCCL in this socket",
 	    "PublicDescription": "The number of all operations received by the HHA from another SCCL in this socket",
 	    "Unit": "hisi_sccl,hha"
    },
    {
-	    "EventCode": "0x03",
-	    "EventName": "uncore_hisi_hha.rx_ccix",
+	    "ConfigCode": "0x03",
+	    "EventName": "rx_ccix",
 	    "BriefDescription": "Count of the number of operations that HHA has received from CCIX",
 	    "PublicDescription": "Count of the number of operations that HHA has received from CCIX",
 	    "Unit": "hisi_sccl,hha"
    },
    {
-	    "EventCode": "0x1c",
-	    "EventName": "uncore_hisi_hha.rd_ddr_64b",
+	    "ConfigCode": "0x4",
+	    "EventName": "rx_wbi",
+	    "Unit": "hisi_sccl,hha"
+   },
+   {
+	    "ConfigCode": "0x5",
+	    "EventName": "rx_wbip",
+	    "Unit": "hisi_sccl,hha"
+   },
+   {
+	    "ConfigCode": "0x11",
+	    "EventName": "rx_wtistash",
+	    "Unit": "hisi_sccl,hha"
+   },
+   {
+	    "ConfigCode": "0x1c",
+	    "EventName": "rd_ddr_64b",
 	    "BriefDescription": "The number of read operations sent by HHA to DDRC which size is 64 bytes",
 	    "PublicDescription": "The number of read operations sent by HHA to DDRC which size is 64bytes",
 	    "Unit": "hisi_sccl,hha"
    },
    {
-	    "EventCode": "0x1d",
-	    "EventName": "uncore_hisi_hha.wr_ddr_64b",
+	    "ConfigCode": "0x1d",
+	    "EventName": "wr_ddr_64b",
 	    "BriefDescription": "The number of write operations sent by HHA to DDRC which size is 64 bytes",
 	    "PublicDescription": "The number of write operations sent by HHA to DDRC which size is 64 bytes",
 	    "Unit": "hisi_sccl,hha"
    },
    {
-	    "EventCode": "0x1e",
-	    "EventName": "uncore_hisi_hha.rd_ddr_128b",
+	    "ConfigCode": "0x1e",
+	    "EventName": "rd_ddr_128b",
 	    "BriefDescription": "The number of read operations sent by HHA to DDRC which size is 128 bytes",
 	    "PublicDescription": "The number of read operations sent by HHA to DDRC which size is 128 bytes",
 	    "Unit": "hisi_sccl,hha"
    },
    {
-	    "EventCode": "0x1f",
-	    "EventName": "uncore_hisi_hha.wr_ddr_128b",
+	    "ConfigCode": "0x1f",
+	    "EventName": "wr_ddr_128b",
 	    "BriefDescription": "The number of write operations sent by HHA to DDRC which size is 128 bytes",
 	    "PublicDescription": "The number of write operations sent by HHA to DDRC which size is 128 bytes",
 	    "Unit": "hisi_sccl,hha"
    },
    {
-	    "EventCode": "0x20",
-	    "EventName": "uncore_hisi_hha.spill_num",
+	    "ConfigCode": "0x20",
+	    "EventName": "spill_num",
 	    "BriefDescription": "Count of the number of spill operations that the HHA has sent",
 	    "PublicDescription": "Count of the number of spill operations that the HHA has sent",
 	    "Unit": "hisi_sccl,hha"
    },
    {
-	    "EventCode": "0x21",
-	    "EventName": "uncore_hisi_hha.spill_success",
+	    "ConfigCode": "0x21",
+	    "EventName": "spill_success",
 	    "BriefDescription": "Count of the number of successful spill operations that the HHA has sent",
 	    "PublicDescription": "Count of the number of successful spill operations that the HHA has sent",
 	    "Unit": "hisi_sccl,hha"
+   },
+   {
+	    "ConfigCode": "0x23",
+	    "EventName": "bi_num",
+	    "Unit": "hisi_sccl,hha"
+   },
+   {
+	    "ConfigCode": "0x32",
+	    "EventName": "mediated_num",
+	    "Unit": "hisi_sccl,hha"
+   },
+   {
+	    "ConfigCode": "0x33",
+	    "EventName": "tx_snp_num",
+	    "Unit": "hisi_sccl,hha"
+   },
+   {
+	    "ConfigCode": "0x34",
+	    "EventName": "tx_snp_outer",
+	    "Unit": "hisi_sccl,hha"
+   },
+   {
+	    "ConfigCode": "0x35",
+	    "EventName": "tx_snp_ccix",
+	    "Unit": "hisi_sccl,hha"
+   },
+   {
+	    "ConfigCode": "0x38",
+	    "EventName": "rx_snprspdata",
+	    "Unit": "hisi_sccl,hha"
+   },
+   {
+	    "ConfigCode": "0x3c",
+	    "EventName": "rx_snprsp_outer",
+	    "Unit": "hisi_sccl,hha"
+   },
+   {
+	    "ConfigCode": "0x40",
+	    "EventName": "sdir-lookup",
+	    "Unit": "hisi_sccl,hha"
+   },
+   {
+	    "ConfigCode": "0x41",
+	    "EventName": "edir-lookup",
+	    "Unit": "hisi_sccl,hha"
+   },
+   {
+	    "ConfigCode": "0x42",
+	    "EventName": "sdir-hit",
+	    "Unit": "hisi_sccl,hha"
+   },
+   {
+	    "ConfigCode": "0x43",
+	    "EventName": "edir-hit",
+	    "Unit": "hisi_sccl,hha"
+   },
+   {
+	    "ConfigCode": "0x4c",
+	    "EventName": "sdir-home-migrate",
+	    "Unit": "hisi_sccl,hha"
+   },
+   {
+	    "ConfigCode": "0x4d",
+	    "EventName": "edir-home-migrate",
+	    "Unit": "hisi_sccl,hha"
    }
 ]
diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json
index 67ab19e8cf3a..e3479b65be9a 100644
--- a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json
+++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json
@@ -1,91 +1,91 @@
 [
    {
-	    "EventCode": "0x00",
-	    "EventName": "uncore_hisi_l3c.rd_cpipe",
+	    "ConfigCode": "0x00",
+	    "EventName": "rd_cpipe",
 	    "BriefDescription": "Total read accesses",
 	    "PublicDescription": "Total read accesses",
 	    "Unit": "hisi_sccl,l3c"
    },
    {
-	    "EventCode": "0x01",
-	    "EventName": "uncore_hisi_l3c.wr_cpipe",
+	    "ConfigCode": "0x01",
+	    "EventName": "wr_cpipe",
 	    "BriefDescription": "Total write accesses",
 	    "PublicDescription": "Total write accesses",
 	    "Unit": "hisi_sccl,l3c"
    },
    {
-	    "EventCode": "0x02",
-	    "EventName": "uncore_hisi_l3c.rd_hit_cpipe",
+	    "ConfigCode": "0x02",
+	    "EventName": "rd_hit_cpipe",
 	    "BriefDescription": "Total read hits",
 	    "PublicDescription": "Total read hits",
 	    "Unit": "hisi_sccl,l3c"
    },
    {
-	    "EventCode": "0x03",
-	    "EventName": "uncore_hisi_l3c.wr_hit_cpipe",
+	    "ConfigCode": "0x03",
+	    "EventName": "wr_hit_cpipe",
 	    "BriefDescription": "Total write hits",
 	    "PublicDescription": "Total write hits",
 	    "Unit": "hisi_sccl,l3c"
    },
    {
-	    "EventCode": "0x04",
-	    "EventName": "uncore_hisi_l3c.victim_num",
+	    "ConfigCode": "0x04",
+	    "EventName": "victim_num",
 	    "BriefDescription": "l3c precharge commands",
 	    "PublicDescription": "l3c precharge commands",
 	    "Unit": "hisi_sccl,l3c"
    },
    {
-	    "EventCode": "0x20",
-	    "EventName": "uncore_hisi_l3c.rd_spipe",
+	    "ConfigCode": "0x20",
+	    "EventName": "rd_spipe",
 	    "BriefDescription": "Count of the number of read lines that come from this cluster of CPU core in spipe",
 	    "PublicDescription": "Count of the number of read lines that come from this cluster of CPU core in spipe",
 	    "Unit": "hisi_sccl,l3c"
    },
    {
-	    "EventCode": "0x21",
-	    "EventName": "uncore_hisi_l3c.wr_spipe",
+	    "ConfigCode": "0x21",
+	    "EventName": "wr_spipe",
 	    "BriefDescription": "Count of the number of write lines that come from this cluster of CPU core in spipe",
 	    "PublicDescription": "Count of the number of write lines that come from this cluster of CPU core in spipe",
 	    "Unit": "hisi_sccl,l3c"
    },
    {
-	    "EventCode": "0x22",
-	    "EventName": "uncore_hisi_l3c.rd_hit_spipe",
+	    "ConfigCode": "0x22",
+	    "EventName": "rd_hit_spipe",
 	    "BriefDescription": "Count of the number of read lines that hits in spipe of this L3C",
 	    "PublicDescription": "Count of the number of read lines that hits in spipe of this L3C",
 	    "Unit": "hisi_sccl,l3c"
    },
    {
-	    "EventCode": "0x23",
-	    "EventName": "uncore_hisi_l3c.wr_hit_spipe",
+	    "ConfigCode": "0x23",
+	    "EventName": "wr_hit_spipe",
 	    "BriefDescription": "Count of the number of write lines that hits in spipe of this L3C",
 	    "PublicDescription": "Count of the number of write lines that hits in spipe of this L3C",
 	    "Unit": "hisi_sccl,l3c"
    },
    {
-	    "EventCode": "0x29",
-	    "EventName": "uncore_hisi_l3c.back_invalid",
+	    "ConfigCode": "0x29",
+	    "EventName": "back_invalid",
 	    "BriefDescription": "Count of the number of L3C back invalid operations",
 	    "PublicDescription": "Count of the number of L3C back invalid operations",
 	    "Unit": "hisi_sccl,l3c"
    },
    {
-	    "EventCode": "0x40",
-	    "EventName": "uncore_hisi_l3c.retry_cpu",
+	    "ConfigCode": "0x40",
+	    "EventName": "retry_cpu",
 	    "BriefDescription": "Count of the number of retry that L3C suppresses the CPU operations",
 	    "PublicDescription": "Count of the number of retry that L3C suppresses the CPU operations",
 	    "Unit": "hisi_sccl,l3c"
    },
    {
-	    "EventCode": "0x41",
-	    "EventName": "uncore_hisi_l3c.retry_ring",
+	    "ConfigCode": "0x41",
+	    "EventName": "retry_ring",
 	    "BriefDescription": "Count of the number of retry that L3C suppresses the ring operations",
 	    "PublicDescription": "Count of the number of retry that L3C suppresses the ring operations",
 	    "Unit": "hisi_sccl,l3c"
    },
    {
-	    "EventCode": "0x42",
-	    "EventName": "uncore_hisi_l3c.prefetch_drop",
+	    "ConfigCode": "0x42",
+	    "EventName": "prefetch_drop",
 	    "BriefDescription": "Count of the number of prefetch drops from this L3C",
 	    "PublicDescription": "Count of the number of prefetch drops from this L3C",
 	    "Unit": "hisi_sccl,l3c"
-- 
2.26.2


^ permalink raw reply related	[flat|nested] 12+ messages in thread

* Re: [PATCH 1/5] perf parse-events: Set numeric term config
  2021-09-16 12:34 ` [PATCH 1/5] perf parse-events: Set numeric term config John Garry
@ 2021-09-28 17:59   ` Ian Rogers
  2021-09-28 19:16     ` Arnaldo Carvalho de Melo
  0 siblings, 1 reply; 12+ messages in thread
From: Ian Rogers @ 2021-09-28 17:59 UTC (permalink / raw)
  To: John Garry
  Cc: will, mathieu.poirier, leo.yan, peterz, mingo, acme,
	mark.rutland, alexander.shishkin, jolsa, namhyung,
	linux-arm-kernel, linux-perf-users, linux-kernel, linuxarm,
	zhangshaokun, liuqi115

On Thu, Sep 16, 2021 at 5:39 AM John Garry <john.garry@huawei.com> wrote:
>
> For numeric terms, the config field may be NULL as it is not set from the
> l+y parsing.
>
> Fix by setting the term config from the term type name.
>
> Also fix up the pmu-events test to set the alias strings to set the period
> term properly, and fix up parse-events test to check the term config
> string.
>
> Signed-off-by: John Garry <john.garry@huawei.com>

Acked-by: Ian Rogers <irogers@google.com>

Having this would be very useful with an issue I'm looking into.

Thanks,
Ian

> ---
>  tools/perf/tests/parse-events.c | 8 ++++----
>  tools/perf/tests/pmu-events.c   | 6 +++---
>  tools/perf/util/parse-events.c  | 2 +-
>  3 files changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/tools/perf/tests/parse-events.c b/tools/perf/tests/parse-events.c
> index fd3556cc9ad4..8875e388563e 100644
> --- a/tools/perf/tests/parse-events.c
> +++ b/tools/perf/tests/parse-events.c
> @@ -605,7 +605,7 @@ static int test__checkterms_simple(struct list_head *terms)
>         TEST_ASSERT_VAL("wrong type val",
>                         term->type_val == PARSE_EVENTS__TERM_TYPE_NUM);
>         TEST_ASSERT_VAL("wrong val", term->val.num == 10);
> -       TEST_ASSERT_VAL("wrong config", !term->config);
> +       TEST_ASSERT_VAL("wrong config", !strcmp(term->config, "config"));
>
>         /* config1 */
>         term = list_entry(term->list.next, struct parse_events_term, list);
> @@ -614,7 +614,7 @@ static int test__checkterms_simple(struct list_head *terms)
>         TEST_ASSERT_VAL("wrong type val",
>                         term->type_val == PARSE_EVENTS__TERM_TYPE_NUM);
>         TEST_ASSERT_VAL("wrong val", term->val.num == 1);
> -       TEST_ASSERT_VAL("wrong config", !term->config);
> +       TEST_ASSERT_VAL("wrong config", !strcmp(term->config, "config1"));
>
>         /* config2=3 */
>         term = list_entry(term->list.next, struct parse_events_term, list);
> @@ -623,7 +623,7 @@ static int test__checkterms_simple(struct list_head *terms)
>         TEST_ASSERT_VAL("wrong type val",
>                         term->type_val == PARSE_EVENTS__TERM_TYPE_NUM);
>         TEST_ASSERT_VAL("wrong val", term->val.num == 3);
> -       TEST_ASSERT_VAL("wrong config", !term->config);
> +       TEST_ASSERT_VAL("wrong config", !strcmp(term->config, "config2"));
>
>         /* umask=1*/
>         term = list_entry(term->list.next, struct parse_events_term, list);
> @@ -661,7 +661,7 @@ static int test__checkterms_simple(struct list_head *terms)
>         TEST_ASSERT_VAL("wrong type val",
>                         term->type_val == PARSE_EVENTS__TERM_TYPE_NUM);
>         TEST_ASSERT_VAL("wrong val", term->val.num == 0xead);
> -       TEST_ASSERT_VAL("wrong config", !term->config);
> +       TEST_ASSERT_VAL("wrong config", !strcmp(term->config, "config"));
>         return 0;
>  }
>
> diff --git a/tools/perf/tests/pmu-events.c b/tools/perf/tests/pmu-events.c
> index 43743cf719ef..8c5a6ba1cb14 100644
> --- a/tools/perf/tests/pmu-events.c
> +++ b/tools/perf/tests/pmu-events.c
> @@ -67,7 +67,7 @@ static const struct perf_pmu_test_event segment_reg_loads_any = {
>                 .desc = "Number of segment register loads",
>                 .topic = "other",
>         },
> -       .alias_str = "umask=0x80,(null)=0x30d40,event=0x6",
> +       .alias_str = "umask=0x80,period=0x30d40,event=0x6",
>         .alias_long_desc = "Number of segment register loads",
>  };
>
> @@ -78,7 +78,7 @@ static const struct perf_pmu_test_event dispatch_blocked_any = {
>                 .desc = "Memory cluster signals to block micro-op dispatch for any reason",
>                 .topic = "other",
>         },
> -       .alias_str = "umask=0x20,(null)=0x30d40,event=0x9",
> +       .alias_str = "umask=0x20,period=0x30d40,event=0x9",
>         .alias_long_desc = "Memory cluster signals to block micro-op dispatch for any reason",
>  };
>
> @@ -89,7 +89,7 @@ static const struct perf_pmu_test_event eist_trans = {
>                 .desc = "Number of Enhanced Intel SpeedStep(R) Technology (EIST) transitions",
>                 .topic = "other",
>         },
> -       .alias_str = "umask=0,(null)=0x30d40,event=0x3a",
> +       .alias_str = "umask=0,period=0x30d40,event=0x3a",
>         .alias_long_desc = "Number of Enhanced Intel SpeedStep(R) Technology (EIST) transitions",
>  };
>
> diff --git a/tools/perf/util/parse-events.c b/tools/perf/util/parse-events.c
> index 51a2219df601..e10243454e8b 100644
> --- a/tools/perf/util/parse-events.c
> +++ b/tools/perf/util/parse-events.c
> @@ -3083,7 +3083,7 @@ int parse_events_term__num(struct parse_events_term **term,
>         struct parse_events_term temp = {
>                 .type_val  = PARSE_EVENTS__TERM_TYPE_NUM,
>                 .type_term = type_term,
> -               .config    = config,
> +               .config    = config ? : strdup(config_term_names[type_term]),
>                 .no_value  = no_value,
>                 .err_term  = loc_term ? loc_term->first_column : 0,
>                 .err_val   = loc_val  ? loc_val->first_column  : 0,
> --
> 2.26.2
>

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH 2/5] perf jevents: Support ConfigCode
  2021-09-16 12:34 ` [PATCH 2/5] perf jevents: Support ConfigCode John Garry
@ 2021-09-28 18:00   ` Ian Rogers
  0 siblings, 0 replies; 12+ messages in thread
From: Ian Rogers @ 2021-09-28 18:00 UTC (permalink / raw)
  To: John Garry
  Cc: will, mathieu.poirier, leo.yan, peterz, mingo, acme,
	mark.rutland, alexander.shishkin, jolsa, namhyung,
	linux-arm-kernel, linux-perf-users, linux-kernel, linuxarm,
	zhangshaokun, liuqi115

On Thu, Sep 16, 2021 at 5:39 AM John Garry <john.garry@huawei.com> wrote:
>
> Some PMUs use "config=XXX" for eventcodes, like:
>
> more /sys/bus/event_source/devices/hisi_sccl1_ddrc3/events/act_cmd
> config=0x5
>
> However jevents would give an alias with .event field "event=0x5" for this
> event. This is handled without issue by the parse events code, but the pmu
> alias code gets a bit confused, as it warns about assigning "event=0x5"
> over "config=0x5" in perf_pmu_assign_str() when merging aliases:
> ./perf stat -v -e act_cmd
> ...
> alias act_cmd differs in field 'value'
> ...
>
> To make things a bit more straightforward, allow jevents to support
> "config=XXX" as well, by supporting a "ConfigCode" field.
>
> Signed-off-by: John Garry <john.garry@huawei.com>

Acked-by: Ian Rogers <irogers@google.com>

Thanks,
Ian

> ---
>  tools/perf/pmu-events/jevents.c | 13 ++++++++++++-
>  1 file changed, 12 insertions(+), 1 deletion(-)
>
> diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c
> index 6731b3cf0c2f..ef92c2fdd45d 100644
> --- a/tools/perf/pmu-events/jevents.c
> +++ b/tools/perf/pmu-events/jevents.c
> @@ -575,10 +575,12 @@ static int json_events(const char *fn,
>                 struct json_event je = {};
>                 char *arch_std = NULL;
>                 unsigned long long eventcode = 0;
> +               unsigned long long configcode = 0;
>                 struct msrmap *msr = NULL;
>                 jsmntok_t *msrval = NULL;
>                 jsmntok_t *precise = NULL;
>                 jsmntok_t *obj = tok++;
> +               bool configcode_present = false;
>
>                 EXPECT(obj->type == JSMN_OBJECT, obj, "expected object");
>                 for (j = 0; j < obj->size; j += 2) {
> @@ -601,6 +603,12 @@ static int json_events(const char *fn,
>                                 addfield(map, &code, "", "", val);
>                                 eventcode |= strtoul(code, NULL, 0);
>                                 free(code);
> +                       } else if (json_streq(map, field, "ConfigCode")) {
> +                               char *code = NULL;
> +                               addfield(map, &code, "", "", val);
> +                               configcode |= strtoul(code, NULL, 0);
> +                               free(code);
> +                               configcode_present = true;
>                         } else if (json_streq(map, field, "ExtSel")) {
>                                 char *code = NULL;
>                                 addfield(map, &code, "", "", val);
> @@ -682,7 +690,10 @@ static int json_events(const char *fn,
>                                 addfield(map, &extra_desc, " ",
>                                                 "(Precise event)", NULL);
>                 }
> -               snprintf(buf, sizeof buf, "event=%#llx", eventcode);
> +               if (configcode_present)
> +                       snprintf(buf, sizeof buf, "config=%#llx", configcode);
> +               else
> +                       snprintf(buf, sizeof buf, "event=%#llx", eventcode);
>                 addfield(map, &event, ",", buf, NULL);
>                 if (je.desc && extra_desc)
>                         addfield(map, &je.desc, " ", extra_desc, NULL);
> --
> 2.26.2
>

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH 3/5] perf test: Verify more event members in pmu-events test
  2021-09-16 12:34 ` [PATCH 3/5] perf test: Verify more event members in pmu-events test John Garry
@ 2021-09-28 18:02   ` Ian Rogers
  0 siblings, 0 replies; 12+ messages in thread
From: Ian Rogers @ 2021-09-28 18:02 UTC (permalink / raw)
  To: John Garry
  Cc: will, mathieu.poirier, leo.yan, peterz, mingo, acme,
	mark.rutland, alexander.shishkin, jolsa, namhyung,
	linux-arm-kernel, linux-perf-users, linux-kernel, linuxarm,
	zhangshaokun, liuqi115

On Thu, Sep 16, 2021 at 5:39 AM John Garry <john.garry@huawei.com> wrote:
>
> Function compare_pmu_events() does not compare all struct pmu-events
> members, so add tests for missing members "name", "event", "aggr_mod",
> "event", "metric_constraint", and "metric_group", and re-order the tests
> to match current struct pmu-events member ordering.
>
> Also fix uncore_hisi_l3c_rd_hit_cpipe.event member, now that we're actually
> testing it.
>
> Signed-off-by: John Garry <john.garry@huawei.com>

Acked-by: Ian Rogers <irogers@google.com>

Thanks,
Ian

> ---
>  tools/perf/tests/pmu-events.c | 50 ++++++++++++++++++++++++++++-------
>  1 file changed, 40 insertions(+), 10 deletions(-)
>
> diff --git a/tools/perf/tests/pmu-events.c b/tools/perf/tests/pmu-events.c
> index 8c5a6ba1cb14..adfc17f51c7b 100644
> --- a/tools/perf/tests/pmu-events.c
> +++ b/tools/perf/tests/pmu-events.c
> @@ -146,7 +146,7 @@ static const struct perf_pmu_test_event unc_cbo_xsnp_response_miss_eviction = {
>  static const struct perf_pmu_test_event uncore_hisi_l3c_rd_hit_cpipe = {
>         .event = {
>                 .name = "uncore_hisi_l3c.rd_hit_cpipe",
> -               .event = "event=0x2",
> +               .event = "event=0x7",
>                 .desc = "Total read hits. Unit: hisi_sccl,l3c ",
>                 .topic = "uncore",
>                 .long_desc = "Total read hits",
> @@ -255,6 +255,24 @@ static struct pmu_event *__test_pmu_get_sys_events_table(void)
>
>  static int compare_pmu_events(struct pmu_event *e1, const struct pmu_event *e2)
>  {
> +       if (!is_same(e1->name, e2->name)) {
> +               pr_debug2("testing event e1 %s: mismatched name string, %s vs %s\n",
> +                         e1->name, e1->name, e2->name);
> +               return -1;
> +       }
> +
> +       if (!is_same(e1->compat, e2->compat)) {
> +               pr_debug2("testing event e1 %s: mismatched compat string, %s vs %s\n",
> +                         e1->name, e1->compat, e2->compat);
> +               return -1;
> +       }
> +
> +       if (!is_same(e1->event, e2->event)) {
> +               pr_debug2("testing event e1 %s: mismatched event, %s vs %s\n",
> +                         e1->name, e1->event, e2->event);
> +               return -1;
> +       }
> +
>         if (!is_same(e1->desc, e2->desc)) {
>                 pr_debug2("testing event e1 %s: mismatched desc, %s vs %s\n",
>                           e1->name, e1->desc, e2->desc);
> @@ -273,6 +291,12 @@ static int compare_pmu_events(struct pmu_event *e1, const struct pmu_event *e2)
>                 return -1;
>         }
>
> +       if (!is_same(e1->pmu, e2->pmu)) {
> +               pr_debug2("testing event e1 %s: mismatched pmu string, %s vs %s\n",
> +                         e1->name, e1->pmu, e2->pmu);
> +               return -1;
> +       }
> +
>         if (!is_same(e1->unit, e2->unit)) {
>                 pr_debug2("testing event e1 %s: mismatched unit, %s vs %s\n",
>                           e1->name, e1->unit, e2->unit);
> @@ -285,6 +309,12 @@ static int compare_pmu_events(struct pmu_event *e1, const struct pmu_event *e2)
>                 return -1;
>         }
>
> +       if (!is_same(e1->aggr_mode, e2->aggr_mode)) {
> +               pr_debug2("testing event e1 %s: mismatched aggr_mode, %s vs %s\n",
> +                         e1->name, e1->aggr_mode, e2->aggr_mode);
> +               return -1;
> +       }
> +
>         if (!is_same(e1->metric_expr, e2->metric_expr)) {
>                 pr_debug2("testing event e1 %s: mismatched metric_expr, %s vs %s\n",
>                           e1->name, e1->metric_expr, e2->metric_expr);
> @@ -297,21 +327,21 @@ static int compare_pmu_events(struct pmu_event *e1, const struct pmu_event *e2)
>                 return -1;
>         }
>
> -       if (!is_same(e1->deprecated, e2->deprecated)) {
> -               pr_debug2("testing event e1 %s: mismatched deprecated, %s vs %s\n",
> -                         e1->name, e1->deprecated, e2->deprecated);
> +       if (!is_same(e1->metric_group, e2->metric_group)) {
> +               pr_debug2("testing event e1 %s: mismatched metric_group, %s vs %s\n",
> +                         e1->name, e1->metric_group, e2->metric_group);
>                 return -1;
>         }
>
> -       if (!is_same(e1->pmu, e2->pmu)) {
> -               pr_debug2("testing event e1 %s: mismatched pmu string, %s vs %s\n",
> -                         e1->name, e1->pmu, e2->pmu);
> +       if (!is_same(e1->deprecated, e2->deprecated)) {
> +               pr_debug2("testing event e1 %s: mismatched deprecated, %s vs %s\n",
> +                         e1->name, e1->deprecated, e2->deprecated);
>                 return -1;
>         }
>
> -       if (!is_same(e1->compat, e2->compat)) {
> -               pr_debug2("testing event e1 %s: mismatched compat string, %s vs %s\n",
> -                         e1->name, e1->compat, e2->compat);
> +       if (!is_same(e1->metric_constraint, e2->metric_constraint)) {
> +               pr_debug2("testing event e1 %s: mismatched metric_constant, %s vs %s\n",
> +                         e1->name, e1->metric_constraint, e2->metric_constraint);
>                 return -1;
>         }
>
> --
> 2.26.2
>

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH 4/5] perf test: Add pmu-event test for event described as "config="
  2021-09-16 12:34 ` [PATCH 4/5] perf test: Add pmu-event test for event described as "config=" John Garry
@ 2021-09-28 18:03   ` Ian Rogers
  0 siblings, 0 replies; 12+ messages in thread
From: Ian Rogers @ 2021-09-28 18:03 UTC (permalink / raw)
  To: John Garry
  Cc: will, mathieu.poirier, leo.yan, peterz, mingo, acme,
	mark.rutland, alexander.shishkin, jolsa, namhyung,
	linux-arm-kernel, linux-perf-users, linux-kernel, linuxarm,
	zhangshaokun, liuqi115

On Thu, Sep 16, 2021 at 5:39 AM John Garry <john.garry@huawei.com> wrote:
>
> Add a new test event for a system event whose event member is in form
> "config=".
>
> Signed-off-by: John Garry <john.garry@huawei.com>

Acked-by: Ian Rogers <irogers@google.com>

Thanks,
Ian

> ---
>  .../arch/test/test_soc/sys/uncore.json        |  7 ++++++
>  tools/perf/tests/pmu-events.c                 | 25 +++++++++++++++++++
>  2 files changed, 32 insertions(+)
>
> diff --git a/tools/perf/pmu-events/arch/test/test_soc/sys/uncore.json b/tools/perf/pmu-events/arch/test/test_soc/sys/uncore.json
> index 0f681a6e10ea..c7e7528db315 100644
> --- a/tools/perf/pmu-events/arch/test/test_soc/sys/uncore.json
> +++ b/tools/perf/pmu-events/arch/test/test_soc/sys/uncore.json
> @@ -6,4 +6,11 @@
>             "Unit": "sys_ddr_pmu",
>             "Compat": "v8"
>     },
> +   {
> +           "BriefDescription": "ccn read-cycles event",
> +           "ConfigCode": "0x2c",
> +           "EventName": "sys_ccn_pmu.read_cycles",
> +           "Unit": "sys_ccn_pmu",
> +           "Compat": "0x01"
> +   }
>  ]
> diff --git a/tools/perf/tests/pmu-events.c b/tools/perf/tests/pmu-events.c
> index adfc17f51c7b..f14266a4c513 100644
> --- a/tools/perf/tests/pmu-events.c
> +++ b/tools/perf/tests/pmu-events.c
> @@ -208,8 +208,23 @@ static const struct perf_pmu_test_event sys_ddr_pmu_write_cycles = {
>         .matching_pmu = "uncore_sys_ddr_pmu",
>  };
>
> +static const struct perf_pmu_test_event sys_ccn_pmu_read_cycles = {
> +       .event = {
> +               .name = "sys_ccn_pmu.read_cycles",
> +               .event = "config=0x2c",
> +               .desc = "ccn read-cycles event. Unit: uncore_sys_ccn_pmu ",
> +               .topic = "uncore",
> +               .pmu = "uncore_sys_ccn_pmu",
> +               .compat = "0x01",
> +       },
> +       .alias_str = "config=0x2c",
> +       .alias_long_desc = "ccn read-cycles event. Unit: uncore_sys_ccn_pmu ",
> +       .matching_pmu = "uncore_sys_ccn_pmu",
> +};
> +
>  static const struct perf_pmu_test_event *sys_events[] = {
>         &sys_ddr_pmu_write_cycles,
> +       &sys_ccn_pmu_read_cycles,
>         NULL
>  };
>
> @@ -677,6 +692,16 @@ static struct perf_pmu_test_pmu test_pmus[] = {
>                         &sys_ddr_pmu_write_cycles,
>                 },
>         },
> +       {
> +               .pmu = {
> +                       .name = (char *)"uncore_sys_ccn_pmu4",
> +                       .is_uncore = 1,
> +                       .id = (char *)"0x01",
> +               },
> +               .aliases = {
> +                       &sys_ccn_pmu_read_cycles,
> +               },
> +       },
>  };
>
>  /* Test that aliases generated are as expected */
> --
> 2.26.2
>

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH 5/5] perf vendor events arm64: Revise hip08 uncore events
  2021-09-16 12:34 ` [PATCH 5/5] perf vendor events arm64: Revise hip08 uncore events John Garry
@ 2021-09-28 18:04   ` Ian Rogers
  0 siblings, 0 replies; 12+ messages in thread
From: Ian Rogers @ 2021-09-28 18:04 UTC (permalink / raw)
  To: John Garry
  Cc: will, mathieu.poirier, leo.yan, peterz, mingo, acme,
	mark.rutland, alexander.shishkin, jolsa, namhyung,
	linux-arm-kernel, linux-perf-users, linux-kernel, linuxarm,
	zhangshaokun, liuqi115

On Thu, Sep 16, 2021 at 5:39 AM John Garry <john.garry@huawei.com> wrote:
>
> To improve alias matching, remove the PMU name prefix from the EventName.
> This will mean that the pmu code will merge aliases, such that we no
> longer get a huge list of per-PMU events - see perf_pmu_merge_alias().
>
> Also make the following associated changes:
> - Use "ConfigCode" rather than "EventCode", so the pmu code is not so
>   disagreeable about inconsistent event codes
> - Add undocumented HHA event codes to allow alias merging (for those
>   events)
>
> Signed-off-by: John Garry <john.garry@huawei.com>

Acked-by: Ian Rogers <irogers@google.com>

Thanks,
Ian

> ---
>  .../arm64/hisilicon/hip08/uncore-ddrc.json    |  32 ++---
>  .../arm64/hisilicon/hip08/uncore-hha.json     | 120 +++++++++++++++---
>  .../arm64/hisilicon/hip08/uncore-l3c.json     |  52 ++++----
>  3 files changed, 142 insertions(+), 62 deletions(-)
>
> diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json
> index 61514d38601b..2b3cb55df288 100644
> --- a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json
> +++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json
> @@ -1,56 +1,56 @@
>  [
>     {
> -           "EventCode": "0x00",
> -           "EventName": "uncore_hisi_ddrc.flux_wr",
> +           "ConfigCode": "0x00",
> +           "EventName": "flux_wr",
>             "BriefDescription": "DDRC total write operations",
>             "PublicDescription": "DDRC total write operations",
>             "Unit": "hisi_sccl,ddrc"
>     },
>     {
> -           "EventCode": "0x01",
> -           "EventName": "uncore_hisi_ddrc.flux_rd",
> +           "ConfigCode": "0x01",
> +           "EventName": "flux_rd",
>             "BriefDescription": "DDRC total read operations",
>             "PublicDescription": "DDRC total read operations",
>             "Unit": "hisi_sccl,ddrc"
>     },
>     {
> -           "EventCode": "0x02",
> -           "EventName": "uncore_hisi_ddrc.flux_wcmd",
> +           "ConfigCode": "0x02",
> +           "EventName": "flux_wcmd",
>             "BriefDescription": "DDRC write commands",
>             "PublicDescription": "DDRC write commands",
>             "Unit": "hisi_sccl,ddrc"
>     },
>     {
> -           "EventCode": "0x03",
> -           "EventName": "uncore_hisi_ddrc.flux_rcmd",
> +           "ConfigCode": "0x03",
> +           "EventName": "flux_rcmd",
>             "BriefDescription": "DDRC read commands",
>             "PublicDescription": "DDRC read commands",
>             "Unit": "hisi_sccl,ddrc"
>     },
>     {
> -           "EventCode": "0x04",
> -           "EventName": "uncore_hisi_ddrc.pre_cmd",
> +           "ConfigCode": "0x04",
> +           "EventName": "pre_cmd",
>             "BriefDescription": "DDRC precharge commands",
>             "PublicDescription": "DDRC precharge commands",
>             "Unit": "hisi_sccl,ddrc"
>     },
>     {
> -           "EventCode": "0x05",
> -           "EventName": "uncore_hisi_ddrc.act_cmd",
> +           "ConfigCode": "0x05",
> +           "EventName": "act_cmd",
>             "BriefDescription": "DDRC active commands",
>             "PublicDescription": "DDRC active commands",
>             "Unit": "hisi_sccl,ddrc"
>     },
>     {
> -           "EventCode": "0x06",
> -           "EventName": "uncore_hisi_ddrc.rnk_chg",
> +           "ConfigCode": "0x06",
> +           "EventName": "rnk_chg",
>             "BriefDescription": "DDRC rank commands",
>             "PublicDescription": "DDRC rank commands",
>             "Unit": "hisi_sccl,ddrc"
>     },
>     {
> -           "EventCode": "0x07",
> -           "EventName": "uncore_hisi_ddrc.rw_chg",
> +           "ConfigCode": "0x07",
> +           "EventName": "rw_chg",
>             "BriefDescription": "DDRC read and write changes",
>             "PublicDescription": "DDRC read and write changes",
>             "Unit": "hisi_sccl,ddrc"
> diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json
> index ada86782933f..9a7ec7af2060 100644
> --- a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json
> +++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json
> @@ -1,72 +1,152 @@
>  [
>     {
> -           "EventCode": "0x00",
> -           "EventName": "uncore_hisi_hha.rx_ops_num",
> +           "ConfigCode": "0x00",
> +           "EventName": "rx_ops_num",
>             "BriefDescription": "The number of all operations received by the HHA",
>             "PublicDescription": "The number of all operations received by the HHA",
>             "Unit": "hisi_sccl,hha"
>     },
>     {
> -           "EventCode": "0x01",
> -           "EventName": "uncore_hisi_hha.rx_outer",
> +           "ConfigCode": "0x01",
> +           "EventName": "rx_outer",
>             "BriefDescription": "The number of all operations received by the HHA from another socket",
>             "PublicDescription": "The number of all operations received by the HHA from another socket",
>             "Unit": "hisi_sccl,hha"
>     },
>     {
> -           "EventCode": "0x02",
> -           "EventName": "uncore_hisi_hha.rx_sccl",
> +           "ConfigCode": "0x02",
> +           "EventName": "rx_sccl",
>             "BriefDescription": "The number of all operations received by the HHA from another SCCL in this socket",
>             "PublicDescription": "The number of all operations received by the HHA from another SCCL in this socket",
>             "Unit": "hisi_sccl,hha"
>     },
>     {
> -           "EventCode": "0x03",
> -           "EventName": "uncore_hisi_hha.rx_ccix",
> +           "ConfigCode": "0x03",
> +           "EventName": "rx_ccix",
>             "BriefDescription": "Count of the number of operations that HHA has received from CCIX",
>             "PublicDescription": "Count of the number of operations that HHA has received from CCIX",
>             "Unit": "hisi_sccl,hha"
>     },
>     {
> -           "EventCode": "0x1c",
> -           "EventName": "uncore_hisi_hha.rd_ddr_64b",
> +           "ConfigCode": "0x4",
> +           "EventName": "rx_wbi",
> +           "Unit": "hisi_sccl,hha"
> +   },
> +   {
> +           "ConfigCode": "0x5",
> +           "EventName": "rx_wbip",
> +           "Unit": "hisi_sccl,hha"
> +   },
> +   {
> +           "ConfigCode": "0x11",
> +           "EventName": "rx_wtistash",
> +           "Unit": "hisi_sccl,hha"
> +   },
> +   {
> +           "ConfigCode": "0x1c",
> +           "EventName": "rd_ddr_64b",
>             "BriefDescription": "The number of read operations sent by HHA to DDRC which size is 64 bytes",
>             "PublicDescription": "The number of read operations sent by HHA to DDRC which size is 64bytes",
>             "Unit": "hisi_sccl,hha"
>     },
>     {
> -           "EventCode": "0x1d",
> -           "EventName": "uncore_hisi_hha.wr_ddr_64b",
> +           "ConfigCode": "0x1d",
> +           "EventName": "wr_ddr_64b",
>             "BriefDescription": "The number of write operations sent by HHA to DDRC which size is 64 bytes",
>             "PublicDescription": "The number of write operations sent by HHA to DDRC which size is 64 bytes",
>             "Unit": "hisi_sccl,hha"
>     },
>     {
> -           "EventCode": "0x1e",
> -           "EventName": "uncore_hisi_hha.rd_ddr_128b",
> +           "ConfigCode": "0x1e",
> +           "EventName": "rd_ddr_128b",
>             "BriefDescription": "The number of read operations sent by HHA to DDRC which size is 128 bytes",
>             "PublicDescription": "The number of read operations sent by HHA to DDRC which size is 128 bytes",
>             "Unit": "hisi_sccl,hha"
>     },
>     {
> -           "EventCode": "0x1f",
> -           "EventName": "uncore_hisi_hha.wr_ddr_128b",
> +           "ConfigCode": "0x1f",
> +           "EventName": "wr_ddr_128b",
>             "BriefDescription": "The number of write operations sent by HHA to DDRC which size is 128 bytes",
>             "PublicDescription": "The number of write operations sent by HHA to DDRC which size is 128 bytes",
>             "Unit": "hisi_sccl,hha"
>     },
>     {
> -           "EventCode": "0x20",
> -           "EventName": "uncore_hisi_hha.spill_num",
> +           "ConfigCode": "0x20",
> +           "EventName": "spill_num",
>             "BriefDescription": "Count of the number of spill operations that the HHA has sent",
>             "PublicDescription": "Count of the number of spill operations that the HHA has sent",
>             "Unit": "hisi_sccl,hha"
>     },
>     {
> -           "EventCode": "0x21",
> -           "EventName": "uncore_hisi_hha.spill_success",
> +           "ConfigCode": "0x21",
> +           "EventName": "spill_success",
>             "BriefDescription": "Count of the number of successful spill operations that the HHA has sent",
>             "PublicDescription": "Count of the number of successful spill operations that the HHA has sent",
>             "Unit": "hisi_sccl,hha"
> +   },
> +   {
> +           "ConfigCode": "0x23",
> +           "EventName": "bi_num",
> +           "Unit": "hisi_sccl,hha"
> +   },
> +   {
> +           "ConfigCode": "0x32",
> +           "EventName": "mediated_num",
> +           "Unit": "hisi_sccl,hha"
> +   },
> +   {
> +           "ConfigCode": "0x33",
> +           "EventName": "tx_snp_num",
> +           "Unit": "hisi_sccl,hha"
> +   },
> +   {
> +           "ConfigCode": "0x34",
> +           "EventName": "tx_snp_outer",
> +           "Unit": "hisi_sccl,hha"
> +   },
> +   {
> +           "ConfigCode": "0x35",
> +           "EventName": "tx_snp_ccix",
> +           "Unit": "hisi_sccl,hha"
> +   },
> +   {
> +           "ConfigCode": "0x38",
> +           "EventName": "rx_snprspdata",
> +           "Unit": "hisi_sccl,hha"
> +   },
> +   {
> +           "ConfigCode": "0x3c",
> +           "EventName": "rx_snprsp_outer",
> +           "Unit": "hisi_sccl,hha"
> +   },
> +   {
> +           "ConfigCode": "0x40",
> +           "EventName": "sdir-lookup",
> +           "Unit": "hisi_sccl,hha"
> +   },
> +   {
> +           "ConfigCode": "0x41",
> +           "EventName": "edir-lookup",
> +           "Unit": "hisi_sccl,hha"
> +   },
> +   {
> +           "ConfigCode": "0x42",
> +           "EventName": "sdir-hit",
> +           "Unit": "hisi_sccl,hha"
> +   },
> +   {
> +           "ConfigCode": "0x43",
> +           "EventName": "edir-hit",
> +           "Unit": "hisi_sccl,hha"
> +   },
> +   {
> +           "ConfigCode": "0x4c",
> +           "EventName": "sdir-home-migrate",
> +           "Unit": "hisi_sccl,hha"
> +   },
> +   {
> +           "ConfigCode": "0x4d",
> +           "EventName": "edir-home-migrate",
> +           "Unit": "hisi_sccl,hha"
>     }
>  ]
> diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json
> index 67ab19e8cf3a..e3479b65be9a 100644
> --- a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json
> +++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json
> @@ -1,91 +1,91 @@
>  [
>     {
> -           "EventCode": "0x00",
> -           "EventName": "uncore_hisi_l3c.rd_cpipe",
> +           "ConfigCode": "0x00",
> +           "EventName": "rd_cpipe",
>             "BriefDescription": "Total read accesses",
>             "PublicDescription": "Total read accesses",
>             "Unit": "hisi_sccl,l3c"
>     },
>     {
> -           "EventCode": "0x01",
> -           "EventName": "uncore_hisi_l3c.wr_cpipe",
> +           "ConfigCode": "0x01",
> +           "EventName": "wr_cpipe",
>             "BriefDescription": "Total write accesses",
>             "PublicDescription": "Total write accesses",
>             "Unit": "hisi_sccl,l3c"
>     },
>     {
> -           "EventCode": "0x02",
> -           "EventName": "uncore_hisi_l3c.rd_hit_cpipe",
> +           "ConfigCode": "0x02",
> +           "EventName": "rd_hit_cpipe",
>             "BriefDescription": "Total read hits",
>             "PublicDescription": "Total read hits",
>             "Unit": "hisi_sccl,l3c"
>     },
>     {
> -           "EventCode": "0x03",
> -           "EventName": "uncore_hisi_l3c.wr_hit_cpipe",
> +           "ConfigCode": "0x03",
> +           "EventName": "wr_hit_cpipe",
>             "BriefDescription": "Total write hits",
>             "PublicDescription": "Total write hits",
>             "Unit": "hisi_sccl,l3c"
>     },
>     {
> -           "EventCode": "0x04",
> -           "EventName": "uncore_hisi_l3c.victim_num",
> +           "ConfigCode": "0x04",
> +           "EventName": "victim_num",
>             "BriefDescription": "l3c precharge commands",
>             "PublicDescription": "l3c precharge commands",
>             "Unit": "hisi_sccl,l3c"
>     },
>     {
> -           "EventCode": "0x20",
> -           "EventName": "uncore_hisi_l3c.rd_spipe",
> +           "ConfigCode": "0x20",
> +           "EventName": "rd_spipe",
>             "BriefDescription": "Count of the number of read lines that come from this cluster of CPU core in spipe",
>             "PublicDescription": "Count of the number of read lines that come from this cluster of CPU core in spipe",
>             "Unit": "hisi_sccl,l3c"
>     },
>     {
> -           "EventCode": "0x21",
> -           "EventName": "uncore_hisi_l3c.wr_spipe",
> +           "ConfigCode": "0x21",
> +           "EventName": "wr_spipe",
>             "BriefDescription": "Count of the number of write lines that come from this cluster of CPU core in spipe",
>             "PublicDescription": "Count of the number of write lines that come from this cluster of CPU core in spipe",
>             "Unit": "hisi_sccl,l3c"
>     },
>     {
> -           "EventCode": "0x22",
> -           "EventName": "uncore_hisi_l3c.rd_hit_spipe",
> +           "ConfigCode": "0x22",
> +           "EventName": "rd_hit_spipe",
>             "BriefDescription": "Count of the number of read lines that hits in spipe of this L3C",
>             "PublicDescription": "Count of the number of read lines that hits in spipe of this L3C",
>             "Unit": "hisi_sccl,l3c"
>     },
>     {
> -           "EventCode": "0x23",
> -           "EventName": "uncore_hisi_l3c.wr_hit_spipe",
> +           "ConfigCode": "0x23",
> +           "EventName": "wr_hit_spipe",
>             "BriefDescription": "Count of the number of write lines that hits in spipe of this L3C",
>             "PublicDescription": "Count of the number of write lines that hits in spipe of this L3C",
>             "Unit": "hisi_sccl,l3c"
>     },
>     {
> -           "EventCode": "0x29",
> -           "EventName": "uncore_hisi_l3c.back_invalid",
> +           "ConfigCode": "0x29",
> +           "EventName": "back_invalid",
>             "BriefDescription": "Count of the number of L3C back invalid operations",
>             "PublicDescription": "Count of the number of L3C back invalid operations",
>             "Unit": "hisi_sccl,l3c"
>     },
>     {
> -           "EventCode": "0x40",
> -           "EventName": "uncore_hisi_l3c.retry_cpu",
> +           "ConfigCode": "0x40",
> +           "EventName": "retry_cpu",
>             "BriefDescription": "Count of the number of retry that L3C suppresses the CPU operations",
>             "PublicDescription": "Count of the number of retry that L3C suppresses the CPU operations",
>             "Unit": "hisi_sccl,l3c"
>     },
>     {
> -           "EventCode": "0x41",
> -           "EventName": "uncore_hisi_l3c.retry_ring",
> +           "ConfigCode": "0x41",
> +           "EventName": "retry_ring",
>             "BriefDescription": "Count of the number of retry that L3C suppresses the ring operations",
>             "PublicDescription": "Count of the number of retry that L3C suppresses the ring operations",
>             "Unit": "hisi_sccl,l3c"
>     },
>     {
> -           "EventCode": "0x42",
> -           "EventName": "uncore_hisi_l3c.prefetch_drop",
> +           "ConfigCode": "0x42",
> +           "EventName": "prefetch_drop",
>             "BriefDescription": "Count of the number of prefetch drops from this L3C",
>             "PublicDescription": "Count of the number of prefetch drops from this L3C",
>             "Unit": "hisi_sccl,l3c"
> --
> 2.26.2
>

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH 1/5] perf parse-events: Set numeric term config
  2021-09-28 17:59   ` Ian Rogers
@ 2021-09-28 19:16     ` Arnaldo Carvalho de Melo
  0 siblings, 0 replies; 12+ messages in thread
From: Arnaldo Carvalho de Melo @ 2021-09-28 19:16 UTC (permalink / raw)
  To: Ian Rogers
  Cc: John Garry, will, mathieu.poirier, leo.yan, peterz, mingo,
	mark.rutland, alexander.shishkin, jolsa, namhyung,
	linux-arm-kernel, linux-perf-users, linux-kernel, linuxarm,
	zhangshaokun, liuqi115

Em Tue, Sep 28, 2021 at 10:59:42AM -0700, Ian Rogers escreveu:
> On Thu, Sep 16, 2021 at 5:39 AM John Garry <john.garry@huawei.com> wrote:
> >
> > For numeric terms, the config field may be NULL as it is not set from the
> > l+y parsing.
> >
> > Fix by setting the term config from the term type name.
> >
> > Also fix up the pmu-events test to set the alias strings to set the period
> > term properly, and fix up parse-events test to check the term config
> > string.
> >
> > Signed-off-by: John Garry <john.garry@huawei.com>
> 
> Acked-by: Ian Rogers <irogers@google.com>
> 
> Having this would be very useful with an issue I'm looking into.

Thanks, applied the series.

- Arnaldo


^ permalink raw reply	[flat|nested] 12+ messages in thread

end of thread, other threads:[~2021-09-28 19:16 UTC | newest]

Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-09-16 12:34 [PATCH 0/5] Improve perf list support for hisi uncore PMUs John Garry
2021-09-16 12:34 ` [PATCH 1/5] perf parse-events: Set numeric term config John Garry
2021-09-28 17:59   ` Ian Rogers
2021-09-28 19:16     ` Arnaldo Carvalho de Melo
2021-09-16 12:34 ` [PATCH 2/5] perf jevents: Support ConfigCode John Garry
2021-09-28 18:00   ` Ian Rogers
2021-09-16 12:34 ` [PATCH 3/5] perf test: Verify more event members in pmu-events test John Garry
2021-09-28 18:02   ` Ian Rogers
2021-09-16 12:34 ` [PATCH 4/5] perf test: Add pmu-event test for event described as "config=" John Garry
2021-09-28 18:03   ` Ian Rogers
2021-09-16 12:34 ` [PATCH 5/5] perf vendor events arm64: Revise hip08 uncore events John Garry
2021-09-28 18:04   ` Ian Rogers

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