From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8F589C07E9C for ; Tue, 6 Jul 2021 20:16:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6F60C61C30 for ; Tue, 6 Jul 2021 20:16:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229956AbhGFUTd (ORCPT ); Tue, 6 Jul 2021 16:19:33 -0400 Received: from us-smtp-delivery-124.mimecast.com ([216.205.24.124]:48600 "EHLO us-smtp-delivery-124.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229781AbhGFUTd (ORCPT ); Tue, 6 Jul 2021 16:19:33 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1625602613; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=s/BBwhSLYUvHJfPP5fwqPO4ji4FbL7n2m98UsEdtyyY=; b=Y1/NufBCvuInOTejVrQ/Ag+4yfGJe4hX4pid4fyboLB6rPXGB4+YqmVjFA20T+VP9Qg4gs AXt9dNKs3LvlWAF3N36rjMsbAXguIEWDoiZtpNiksGPPZq3tfSyBI4K7t48FyXJgbilt7e 0fi6iCueJx3eMV09uwSLX1KmEoiSuhg= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-51-_2gfo29zNG6mV7a_nLVV7w-1; Tue, 06 Jul 2021 16:16:52 -0400 X-MC-Unique: _2gfo29zNG6mV7a_nLVV7w-1 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 605941023F48; Tue, 6 Jul 2021 20:16:47 +0000 (UTC) Received: from localhost (ovpn-113-79.rdu2.redhat.com [10.10.113.79]) by smtp.corp.redhat.com (Postfix) with ESMTP id D1B9D17240; Tue, 6 Jul 2021 20:16:46 +0000 (UTC) Date: Tue, 6 Jul 2021 15:52:33 -0400 From: Eduardo Habkost To: Pawan Gupta Cc: Thomas Gleixner , Borislav Petkov , Jonathan Corbet , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , x86@kernel.org, "H. Peter Anvin" , "Paul E. McKenney" , Randy Dunlap , Andrew Morton , "Maciej W. Rozycki" , Viresh Kumar , Vlastimil Babka , Tony Luck , Paolo Bonzini , Sean Christopherson , Kyung Min Park , Fenghua Yu , Ricardo Neri , Tom Lendacky , Juergen Gross , Krish Sadhukhan , Kan Liang , Joerg Roedel , Victor Ding , Srinivas Pandruvada , Brijesh Singh , Dave Hansen , Mike Rapoport , Anthony Steinhauser , Anand K Mistry , Andi Kleen , Miguel Ojeda , Nick Desaulniers , Joe Perches , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, kvm@vger.kernel.org Subject: Re: [PATCH 4/4] x86/tsx: Add cmdline tsx=fake to not clear CPUID bits RTM and HLE Message-ID: <20210706195233.h6w4cm73oktfqpgz@habkost.net> References: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Precedence: bulk List-ID: X-Mailing-List: linux-perf-users@vger.kernel.org On Wed, Jun 09, 2021 at 02:14:39PM -0700, Pawan Gupta wrote: > On CPUs that deprecated TSX, clearing the enumeration bits CPUID.RTM and > CPUID.HLE may not be desirable in some corner cases. Like a saved guest > would refuse to resume if it was saved before the microcode update > that deprecated TSX. Why is a global option necessary to allow those guests to be resumed? Why can't KVM_GET_SUPPORTED_CPUID always return the HLE and RTM bits as supported when the host CPU has them? > > Add a cmdline option "tsx=fake" to not clear CPUID bits even when the > hardware always aborts TSX transactions. > > Suggested-by: Tony Luck > Suggested-by: Andi Kleen > Signed-off-by: Pawan Gupta > Reviewed-by: Andi Kleen > Reviewed-by: Tony Luck > Tested-by: Neelima Krishnan [...] -- Eduardo