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From: He Kuang <korenheg@gmail.com>
To: mingo@redhat.com, peterz@infradead.org, acme@kernel.org
Cc: linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
	kornehe@outlook.com, He Kuang <korenhe@tencent.com>
Subject: [PATCH] perf events, x86: Add stalled-cycles-frontend events to supported micro-architectures
Date: Wed, 14 Jul 2021 00:12:47 +0800	[thread overview]
Message-ID: <20210713161247.29536-1-korenheg@gmail.com> (raw)

From: He Kuang <korenhe@tencent.com>

Extend the Intel PMU driver for generic front-end stall events. According
to performance monitoring event files for Intel processors
(https://download.01.org/perfmon/), Haswell, Broadwell, SkyLake and Sunny
Cove, these four types of micro-architectures support
UOPS_ISSUED.STALL_CYCLES but not set, this patch fixes that.

Signed-off-by: He Kuang <korenhe@tencent.com>
---
 arch/x86/events/intel/core.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index fca7a6e2242f..c3c945a7a26d 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -5912,6 +5912,11 @@ __init int intel_pmu_init(void)
 			hsw_format_attr : nhm_format_attr;
 		td_attr  = hsw_events_attrs;
 		mem_attr = hsw_mem_events_attrs;
+
+		/* UOPS_ISSUED.ANY,c=1,i=1 to count stall cycles */
+		intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] =
+			X86_CONFIG(.event=0x0e, .umask=0x01, .inv=1, .cmask=1);
+
 		tsx_attr = hsw_tsx_events_attrs;
 		pr_cont("Haswell events, ");
 		name = "haswell";
@@ -5954,6 +5959,11 @@ __init int intel_pmu_init(void)
 			hsw_format_attr : nhm_format_attr;
 		td_attr  = hsw_events_attrs;
 		mem_attr = hsw_mem_events_attrs;
+
+		/* UOPS_ISSUED.ANY,c=1,i=1 to count stall cycles */
+		intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] =
+			X86_CONFIG(.event=0x0e, .umask=0x01, .inv=1, .cmask=1);
+
 		tsx_attr = hsw_tsx_events_attrs;
 		pr_cont("Broadwell events, ");
 		name = "broadwell";
@@ -6016,6 +6026,11 @@ __init int intel_pmu_init(void)
 		extra_skl_attr = skl_format_attr;
 		td_attr  = hsw_events_attrs;
 		mem_attr = hsw_mem_events_attrs;
+
+		/* UOPS_ISSUED.ANY,c=1,i=1 to count stall cycles */
+		intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] =
+			X86_CONFIG(.event=0x0e, .umask=0x01, .inv=1, .cmask=1);
+
 		tsx_attr = hsw_tsx_events_attrs;
 		intel_pmu_pebs_data_source_skl(pmem);
 
@@ -6065,6 +6080,11 @@ __init int intel_pmu_init(void)
 			hsw_format_attr : nhm_format_attr;
 		extra_skl_attr = skl_format_attr;
 		mem_attr = icl_events_attrs;
+
+		/* UOPS_ISSUED.ANY,c=1,i=1 to count stall cycles */
+		intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] =
+			X86_CONFIG(.event=0x0e, .umask=0x01, .inv=1, .cmask=1);
+
 		td_attr = icl_td_events_attrs;
 		tsx_attr = icl_tsx_events_attrs;
 		x86_pmu.rtm_abort_event = X86_CONFIG(.event=0xc9, .umask=0x04);
-- 
2.31.1


                 reply	other threads:[~2021-07-13 16:12 UTC|newest]

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