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From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
To: Liang Kan <kan.liang@linux.intel.com>,
	<linux-cxl@vger.kernel.org>, <peterz@infradead.org>
Cc: <mingo@redhat.com>, <acme@kernel.org>, <mark.rutland@arm.com>,
	<will@kernel.org>, <dan.j.williams@intel.com>,
	<linuxarm@huawei.com>, <linux-perf-users@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	Davidlohr Bueso <dave@stgolabs.net>,
	Dave Jiang <dave.jiang@intel.com>
Subject: [PATCH v2 5/5] docs: perf: Minimal introduction the the CXL PMU device and driver.
Date: Fri, 24 Mar 2023 17:13:13 +0000	[thread overview]
Message-ID: <20230324171313.18448-6-Jonathan.Cameron@huawei.com> (raw)
In-Reply-To: <20230324171313.18448-1-Jonathan.Cameron@huawei.com>

Very basic introduction to the device and the current driver support
provided. I expect to expand on this in future versions of this patch
set.

Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

--
v2:
- Not renamed the device as now an earlier patch allows the pmu->device
  to have a parent thus making the association explicit.
v1:
- Add docs for how to use a Vendor Defined Counter.
---
 Documentation/admin-guide/perf/cxl.rst   | 65 ++++++++++++++++++++++++
 Documentation/admin-guide/perf/index.rst |  1 +
 2 files changed, 66 insertions(+)

diff --git a/Documentation/admin-guide/perf/cxl.rst b/Documentation/admin-guide/perf/cxl.rst
new file mode 100644
index 000000000000..46235dff4b21
--- /dev/null
+++ b/Documentation/admin-guide/perf/cxl.rst
@@ -0,0 +1,65 @@
+.. SPDX-License-Identifier: GPL-2.0
+
+======================================
+CXL Performance Monitoring Unit (CPMU)
+======================================
+
+The CXL rev 3.0 specification provides a definition of CXL Performance
+Monitoring Unit in section 13.2: Performance Monitoring.
+
+CXL components (e.g. Root Port, Switch Upstream Port, End Point) may have
+any number of CPMU instances. CPMU capabilities are fully discoverable from
+the devices. The specification provides event definitions for all CXL protocol
+message types and a set of additional events for things commonly counted on
+CXL devices (e.g. DRAM events).
+
+CPMU driver
+===========
+
+The CPMU driver register a perf PMU with the name cpmu<id> on the CXL bus.
+
+    /sys/bus/cxl/device/cpmu<id>
+
+The associated PMU is registered as
+
+   /sys/bus/event_sources/devices/cpmu<id>
+
+In common with other CXL bus devices, the id has no specific meaning and the
+relationship to specific CXL device should be established via the device parent
+of the device on the CXL bus.
+
+PMU driver provides description of available events and filter options in sysfs.
+
+The "format" directory describes all formats of the config (event vendor id,
+group id and mask) config1 (threshold, filter enables) and config2 (filter
+parameters) fields of the perf_event_attr structure.  The "events" directory
+describes all documented events show in perf list.
+
+The events shown in perf list are the most fine grained events with a single
+bit of the event mask set. More general events may be enable by setting
+multiple mask bits in config. For example, all Device to Host Read Requests
+may be captured on a single counter by setting the bits for all of
+
+* d2h_req_rdcurr
+* d2h_req_rdown
+* d2h_req_rdshared
+* d2h_req_rdany
+* d2h_req_rdownnodata
+
+Example of usage::
+
+  $#perf list
+  cpmu0/clock_ticks/                                 [Kernel PMU event]
+  cpmu0/d2h_req_itomwr/                              [Kernel PMU event]
+  cpmu0/d2h_req_rdany/                               [Kernel PMU event]
+  cpmu0/d2h_req_rdcurr/                              [Kernel PMU event]
+  -----------------------------------------------------------
+
+  $# perf stat -e cpmu0/clock_ticks/ -e cpmu0/d2h_req_itowrm/
+
+Vendor specific events may also be available and if so can be used via
+
+  $# perf stat -e cpmu0/vid=VID,gid=GID,mask=MASK/
+
+The driver does not support sampling. So "perf record" and attaching to
+a task are unsupported.
diff --git a/Documentation/admin-guide/perf/index.rst b/Documentation/admin-guide/perf/index.rst
index 9de64a40adab..f60be04e4e33 100644
--- a/Documentation/admin-guide/perf/index.rst
+++ b/Documentation/admin-guide/perf/index.rst
@@ -21,3 +21,4 @@ Performance monitor support
    alibaba_pmu
    nvidia-pmu
    meson-ddr-pmu
+   cxl
-- 
2.37.2


      parent reply	other threads:[~2023-03-24 17:16 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-24 17:13 [PATCH v2 0/5] CXL 3.0 Performance Monitoring Unit support Jonathan Cameron
2023-03-24 17:13 ` [PATCH v2 1/5] cxl: Add function to count regblocks of a given type Jonathan Cameron
2023-03-24 17:13 ` [PATCH v2 2/5] perf: Allow a PMU to have a parent Jonathan Cameron
2023-03-27 17:04   ` Liang, Kan
2023-03-28 10:54     ` Jonathan Cameron
2023-03-28 11:01       ` Greg KH
2023-03-29  8:55         ` Jonathan Cameron
2023-03-29  9:03           ` Greg KH
2023-03-24 17:13 ` [PATCH v2 3/5] cxl/pci: Find and register CXL PMU devices Jonathan Cameron
2023-03-24 21:01   ` kernel test robot
2023-03-27 15:50     ` Jonathan Cameron
2023-03-24 17:13 ` [PATCH v2 4/5] cxl: CXL Performance Monitoring Unit driver Jonathan Cameron
2023-03-24 21:12   ` kernel test robot
2023-03-27 15:50     ` Jonathan Cameron
2023-03-24 21:42   ` kernel test robot
2023-03-24 22:03   ` kernel test robot
2023-03-24 22:03   ` kernel test robot
2023-03-27 17:07   ` Liang, Kan
2023-03-29 13:11     ` Jonathan Cameron
2023-03-24 17:13 ` Jonathan Cameron [this message]

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