From: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
To: Thomas Gleixner <tglx@linutronix.de>, Borislav Petkov <bp@alien8.de>
Cc: Jonathan Corbet <corbet@lwn.net>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Jiri Olsa <jolsa@redhat.com>, Namhyung Kim <namhyung@kernel.org>,
x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
"Paul E. McKenney" <paulmck@kernel.org>,
Randy Dunlap <rdunlap@infradead.org>,
Andrew Morton <akpm@linux-foundation.org>,
"Maciej W. Rozycki" <macro@orcam.me.uk>,
Viresh Kumar <viresh.kumar@linaro.org>,
Vlastimil Babka <vbabka@suse.cz>, Tony Luck <tony.luck@intel.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Sean Christopherson <seanjc@google.com>,
Kyung Min Park <kyung.min.park@intel.com>,
Fenghua Yu <fenghua.yu@intel.com>,
Ricardo Neri <ricardo.neri-calderon@linux.intel.com>,
Tom Lendacky <thomas.lendacky@amd.com>,
Juergen Gross <jgross@suse.com>,
Krish Sadhukhan <krish.sadhukhan@oracle.com>,
Kan Liang <kan.liang@linux.intel.com>,
Joerg Roedel <jroedel@suse.de>,
Victor Ding <victording@google.com>,
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>,
Pawan Gupta <pawan.kumar.gupta@linux.intel.com>,
Brijesh Singh <brijesh.singh@amd.com>,
Dave Hansen <dave.hansen@intel.com>,
Mike Rapoport <rppt@kernel.org>,
Anthony Steinhauser <asteinhauser@google.com>,
Anand K Mistry <amistry@google.com>,
Andi Kleen <ak@linux.intel.com>, Miguel Ojeda <ojeda@kernel.org>,
Nick Desaulniers <ndesaulniers@gooogle.com>,
Joe Perches <joe@perches.com>,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-perf-users@vger.kernel.org
Subject: [PATCH 4/4] x86/tsx: Add cmdline tsx=fake to not clear CPUID bits RTM and HLE
Date: Wed, 9 Jun 2021 14:14:39 -0700 [thread overview]
Message-ID: <de6b97a567e273adff1f5268998692bad548aa10.1623272033.git-series.pawan.kumar.gupta@linux.intel.com> (raw)
In-Reply-To: <cover.2d906c322f72ec1420955136ebaa7a4c5073917c.1623272033.git-series.pawan.kumar.gupta@linux.intel.com>
On CPUs that deprecated TSX, clearing the enumeration bits CPUID.RTM and
CPUID.HLE may not be desirable in some corner cases. Like a saved guest
would refuse to resume if it was saved before the microcode update
that deprecated TSX.
Add a cmdline option "tsx=fake" to not clear CPUID bits even when the
hardware always aborts TSX transactions.
Suggested-by: Tony Luck <tony.luck@intel.com>
Suggested-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Tested-by: Neelima Krishnan <neelima.krishnan@intel.com>
---
Documentation/admin-guide/kernel-parameters.txt | 3 +++
arch/x86/kernel/cpu/bugs.c | 5 +++--
arch/x86/kernel/cpu/cpu.h | 1 +
arch/x86/kernel/cpu/tsx.c | 7 +++++--
4 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index cb89dbdedc46..ced9e5596163 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -5693,6 +5693,9 @@
auto - Disable TSX if X86_BUG_TAA is present,
otherwise enable TSX on the system.
+ fake - Do not clear the CPUID bits RTM and HLE even
+ when hardware always aborts TSX transactions.
+
Not specifying this option is equivalent to tsx=off.
See Documentation/admin-guide/hw-vuln/tsx_async_abort.rst
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index d41b70fe4918..46fcc392a339 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -316,8 +316,9 @@ static void __init taa_select_mitigation(void)
return;
}
- /* TSX previously disabled by tsx=off */
- if (!boot_cpu_has(X86_FEATURE_RTM)) {
+ /* TSX previously disabled by tsx=off or by microcode */
+ if (!boot_cpu_has(X86_FEATURE_RTM) ||
+ boot_cpu_has(X86_FEATURE_RTM_ALWAYS_ABORT)) {
taa_mitigation = TAA_MITIGATION_TSX_DISABLED;
goto out;
}
diff --git a/arch/x86/kernel/cpu/cpu.h b/arch/x86/kernel/cpu/cpu.h
index 95521302630d..84a479866c4b 100644
--- a/arch/x86/kernel/cpu/cpu.h
+++ b/arch/x86/kernel/cpu/cpu.h
@@ -49,6 +49,7 @@ enum tsx_ctrl_states {
TSX_CTRL_ENABLE,
TSX_CTRL_DISABLE,
TSX_CTRL_RTM_ALWAYS_ABORT,
+ TSX_CTRL_FAKE,
TSX_CTRL_NOT_SUPPORTED,
};
diff --git a/arch/x86/kernel/cpu/tsx.c b/arch/x86/kernel/cpu/tsx.c
index 5ed99811504c..2f8e50584297 100644
--- a/arch/x86/kernel/cpu/tsx.c
+++ b/arch/x86/kernel/cpu/tsx.c
@@ -113,6 +113,8 @@ void __init tsx_init(void)
tsx_ctrl_state = TSX_CTRL_DISABLE;
} else if (!strcmp(arg, "auto")) {
tsx_ctrl_state = x86_get_tsx_auto_mode();
+ } else if (!strcmp(arg, "fake")) {
+ tsx_ctrl_state = TSX_CTRL_FAKE;
} else {
tsx_ctrl_state = TSX_CTRL_DISABLE;
pr_err("invalid option, defaulting to off\n");
@@ -131,9 +133,10 @@ void __init tsx_init(void)
* Hardware will always abort a TSX transaction if both CPUID bits
* RTM_ALWAYS_ABORT and TSX_FORCE_ABORT are enumerated. In this case it
* is better not to enumerate CPUID.RTM and CPUID.HLE bits. Clear them
- * here.
+ * here, except when user requested not to clear via cmdline tsx=fake.
*/
- if (boot_cpu_has(X86_FEATURE_RTM_ALWAYS_ABORT) &&
+ if (tsx_ctrl_state != TSX_CTRL_FAKE &&
+ boot_cpu_has(X86_FEATURE_RTM_ALWAYS_ABORT) &&
boot_cpu_has(X86_FEATURE_TSX_FORCE_ABORT)) {
tsx_ctrl_state = TSX_CTRL_RTM_ALWAYS_ABORT;
tsx_clear_cpuid();
--
git-series 0.9.1
next prev parent reply other threads:[~2021-06-09 21:14 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-09 20:57 [PATCH 0/4] TSX force abort Pawan Gupta
2021-06-09 20:58 ` [PATCH 1/4] x86/msr: Define new bits in TSX_FORCE_ABORT MSR Pawan Gupta
2021-06-11 8:39 ` Borislav Petkov
2021-06-11 21:31 ` Pawan Gupta
2021-06-09 21:12 ` [PATCH 2/4] perf/x86/intel: Do not deploy workaround when TSX is deprecated Pawan Gupta
2021-06-11 7:50 ` Borislav Petkov
2021-06-11 21:34 ` Pawan Gupta
2021-06-11 22:01 ` Borislav Petkov
2021-06-11 23:21 ` Pawan Gupta
2021-06-09 21:13 ` [PATCH 3/4] x86/tsx: Clear CPUID bits when TSX always force aborts Pawan Gupta
2021-06-11 10:03 ` Borislav Petkov
2021-06-11 21:36 ` Pawan Gupta
2021-06-09 21:14 ` Pawan Gupta [this message]
2021-06-11 10:06 ` [PATCH 4/4] x86/tsx: Add cmdline tsx=fake to not clear CPUID bits RTM and HLE Borislav Petkov
2021-06-11 21:37 ` Pawan Gupta
2021-07-06 19:52 ` Eduardo Habkost
2021-07-06 21:05 ` Paolo Bonzini
2021-07-06 21:33 ` Eduardo Habkost
2021-07-06 21:58 ` Paolo Bonzini
2021-07-07 15:08 ` Eduardo Habkost
2021-07-07 16:42 ` Jim Mattson
2021-07-07 17:08 ` Eduardo Habkost
2021-07-07 17:15 ` Jim Mattson
2021-07-07 18:23 ` Eduardo Habkost
2021-07-08 9:15 ` Paolo Bonzini
2021-07-06 21:16 ` Pawan Gupta
2021-07-06 21:19 ` Eduardo Habkost
2021-07-06 22:51 ` Pawan Gupta
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