On Fri, Sep 10, 2021 at 08:41:30PM +0200, Paul Kocialkowski wrote: > The A31 CSI controller supports two distinct input interfaces: > parallel and an external MIPI CSI-2 bridge. The parallel interface > is often connected to a set of hardware pins while the MIPI CSI-2 > bridge is an internal FIFO-ish link. As a result, these two inputs > are distinguished as two different ports. > > Note that only one of the two may be present on a controller instance. > For example, the V3s has one controller dedicated to MIPI-CSI2 and one > dedicated to parallel. > > Update the binding with an explicit ports node that holds two distinct > port nodes: one for parallel input and one for MIPI CSI-2. > > This is backward-compatible with the single-port approach that was > previously taken for representing the parallel interface port, which > stays enumerated as fwnode port 0. > > Note that additional ports may be added in the future, especially to > support feeding the CSI controller's output to the ISP. > > Signed-off-by: Paul Kocialkowski > Reviewed-by: Rob Herring > Acked-by: Maxime Ripard > --- > .../media/allwinner,sun6i-a31-csi.yaml | 75 +++++++++++++++---- > 1 file changed, 62 insertions(+), 13 deletions(-) > > diff --git a/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml > index 8b568072a069..f4a686b77a38 100644 > --- a/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml > +++ b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml > @@ -61,6 +61,49 @@ properties: > > additionalProperties: false > > + ports: > + $ref: /schemas/graph.yaml#/properties/ports > + > + properties: > + port@0: > + $ref: /schemas/graph.yaml#/$defs/port-base > + description: Parallel input port, connect to a parallel sensor > + > + properties: > + reg: > + const: 0 > + > + endpoint: > + $ref: video-interfaces.yaml# > + unevaluatedProperties: false > + > + properties: > + bus-width: > + enum: [ 8, 10, 12, 16 ] > + > + pclk-sample: true > + hsync-active: true > + vsync-active: true > + > + required: > + - bus-width > + > + additionalProperties: false You don't have to duplicate the entire definition there, you can just reference port: $ref: #/properties/port > + port@1: > + $ref: /schemas/graph.yaml#/$defs/port-base > + description: MIPI CSI-2 bridge input port > + > + properties: > + reg: > + const: 1 > + > + endpoint: > + $ref: video-interfaces.yaml# > + unevaluatedProperties: false > + > + additionalProperties: false > + port@0 is required? And at the top-level, either ports or port are required too > required: > - compatible > - reg > @@ -89,19 +132,25 @@ examples: > "ram"; > resets = <&ccu RST_BUS_CSI>; > > - port { > - /* Parallel bus endpoint */ > - csi1_ep: endpoint { > - remote-endpoint = <&adv7611_ep>; > - bus-width = <16>; > - > - /* > - * If hsync-active/vsync-active are missing, > - * embedded BT.656 sync is used. > - */ > - hsync-active = <0>; /* Active low */ > - vsync-active = <0>; /* Active low */ > - pclk-sample = <1>; /* Rising */ > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + /* Parallel bus endpoint */ > + csi1_ep: endpoint { > + remote-endpoint = <&adv7611_ep>; > + bus-width = <16>; > + > + /* > + * If hsync-active/vsync-active are missing, > + * embedded BT.656 sync is used. > + */ > + hsync-active = <0>; /* Active low */ > + vsync-active = <0>; /* Active low */ > + pclk-sample = <1>; /* Rising */ > + }; > }; > }; > }; I'd keep the original example and add one with the CSI bridge Maxime