From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
Johan Hovold <johan+linaro@kernel.org>
Subject: [PATCH 36/41] arm64: dts: qcom: sm8150: switch PCIe QMP PHY to new style of bindings
Date: Fri, 24 Mar 2023 05:25:09 +0300 [thread overview]
Message-ID: <20230324022514.1800382-37-dmitry.baryshkov@linaro.org> (raw)
In-Reply-To: <20230324022514.1800382-1-dmitry.baryshkov@linaro.org>
Change the PCIe QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8150.dtsi | 66 +++++++++++-----------------
1 file changed, 26 insertions(+), 40 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index be10b68893e8..e4ecc0804cd9 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -1859,7 +1859,7 @@ pcie0: pci@1c00000 {
power-domains = <&gcc PCIE_0_GDSC>;
- phys = <&pcie0_lane>;
+ phys = <&pcie0_phy>;
phy-names = "pciephy";
perst-gpio = <&tlmm 35 GPIO_ACTIVE_HIGH>;
@@ -1873,14 +1873,20 @@ pcie0: pci@1c00000 {
pcie0_phy: phy@1c06000 {
compatible = "qcom,sm8150-qmp-gen3x1-pcie-phy";
- reg = <0 0x01c06000 0 0x1c0>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ reg = <0 0x01c06000 0 0x1000>;
clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,
<&gcc GCC_PCIE_0_CFG_AHB_CLK>,
- <&gcc GCC_PCIE0_PHY_REFGEN_CLK>;
- clock-names = "aux", "cfg_ahb", "refgen";
+ <&gcc GCC_PCIE0_PHY_REFGEN_CLK>,
+ <&gcc GCC_PCIE_0_PIPE_CLK>;
+ clock-names = "aux",
+ "cfg_ahb",
+ "refgen",
+ "pipe";
+
+ clock-output-names = "pcie_0_pipe_clk";
+ #clock-cells = <0>;
+
+ #phy-cells = <0>;
resets = <&gcc GCC_PCIE_0_PHY_BCR>;
reset-names = "phy";
@@ -1889,18 +1895,6 @@ pcie0_phy: phy@1c06000 {
assigned-clock-rates = <100000000>;
status = "disabled";
-
- pcie0_lane: phy@1c06200 {
- reg = <0 0x01c06200 0 0x170>, /* tx */
- <0 0x01c06400 0 0x200>, /* rx */
- <0 0x01c06800 0 0x1f0>, /* pcs */
- <0 0x01c06c00 0 0xf4>; /* "pcs_lane" same as pcs_misc? */
- clocks = <&gcc GCC_PCIE_0_PIPE_CLK>;
- clock-names = "pipe0";
-
- #phy-cells = <0>;
- clock-output-names = "pcie_0_pipe_clk";
- };
};
pcie1: pci@1c08000 {
@@ -1958,7 +1952,7 @@ pcie1: pci@1c08000 {
power-domains = <&gcc PCIE_1_GDSC>;
- phys = <&pcie1_lane>;
+ phys = <&pcie1_phy>;
phy-names = "pciephy";
perst-gpio = <&tlmm 102 GPIO_ACTIVE_HIGH>;
@@ -1972,14 +1966,20 @@ pcie1: pci@1c08000 {
pcie1_phy: phy@1c0e000 {
compatible = "qcom,sm8150-qmp-gen3x2-pcie-phy";
- reg = <0 0x01c0e000 0 0x1c0>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ reg = <0 0x01c0e000 0 0x1000>;
clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,
<&gcc GCC_PCIE_1_CFG_AHB_CLK>,
- <&gcc GCC_PCIE1_PHY_REFGEN_CLK>;
- clock-names = "aux", "cfg_ahb", "refgen";
+ <&gcc GCC_PCIE1_PHY_REFGEN_CLK>,
+ <&gcc GCC_PCIE_1_PIPE_CLK>;
+ clock-names = "aux",
+ "cfg_ahb",
+ "refgen",
+ "pipe";
+
+ clock-output-names = "pcie_1_pipe_clk";
+ #clock-cells = <0>;
+
+ #phy-cells = <0>;
resets = <&gcc GCC_PCIE_1_PHY_BCR>;
reset-names = "phy";
@@ -1988,20 +1988,6 @@ pcie1_phy: phy@1c0e000 {
assigned-clock-rates = <100000000>;
status = "disabled";
-
- pcie1_lane: phy@1c0e200 {
- reg = <0 0x01c0e200 0 0x170>, /* tx0 */
- <0 0x01c0e400 0 0x200>, /* rx0 */
- <0 0x01c0ea00 0 0x1f0>, /* pcs */
- <0 0x01c0e600 0 0x170>, /* tx1 */
- <0 0x01c0e800 0 0x200>, /* rx1 */
- <0 0x01c0ee00 0 0xf4>; /* "pcs_com" same as pcs_misc? */
- clocks = <&gcc GCC_PCIE_1_PIPE_CLK>;
- clock-names = "pipe0";
-
- #phy-cells = <0>;
- clock-output-names = "pcie_1_pipe_clk";
- };
};
ufs_mem_hc: ufshc@1d84000 {
--
2.30.2
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2023-03-24 3:31 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-24 2:24 [PATCH 00/41] phy: qcom-qmp: convert to newer style of bindings Dmitry Baryshkov
2023-03-24 2:24 ` [PATCH 01/41] dt-bindings: phy: migrate QMP USB PHY bindings to qcom,sc8280xp-qmp-usb3-uni-phy.yaml Dmitry Baryshkov
2023-03-24 7:48 ` Johan Hovold
2023-03-24 12:12 ` Dmitry Baryshkov
2023-03-24 9:43 ` Krzysztof Kozlowski
2023-03-24 11:45 ` Dmitry Baryshkov
2023-03-24 2:24 ` [PATCH 02/41] dt-bindings: phy: migrate combo QMP PHY bindings to qcom,sc8280xp-qmp-usb43dp-phy.yaml Dmitry Baryshkov
2023-03-24 7:54 ` Johan Hovold
2023-03-24 2:24 ` [PATCH 03/41] dt-bindings: phy: migrate QMP UFS PHY bindings to qcom,sc8280xp-qmp-ufs-phy.yaml Dmitry Baryshkov
2023-03-24 7:56 ` Johan Hovold
2023-03-24 2:24 ` [PATCH 04/41] dt-bindings: phy: migrate QMP PCIe PHY bindings to qcom,sc8280xp-qmp-pcie-phy.yaml Dmitry Baryshkov
2023-03-24 8:04 ` Johan Hovold
2023-03-24 12:16 ` Dmitry Baryshkov
2023-03-24 2:24 ` [PATCH 05/41] phy: qcom-qmp-usb: make QPHY_PCS_MISC_CLAMP_ENABLE access conditional Dmitry Baryshkov
2023-03-24 2:24 ` [PATCH 06/41] phy: qcom-qmp: move PCS MISC V4 registers to separate header Dmitry Baryshkov
2023-03-24 2:24 ` [PATCH 07/41] phy: qcom-qmp-usb: populate offsets configuration Dmitry Baryshkov
2023-03-24 2:24 ` [PATCH 08/41] phy: qcom-qmp-ufs: " Dmitry Baryshkov
2023-03-24 2:24 ` [PATCH 09/41] phy: qcom-qmp-pcie: " Dmitry Baryshkov
2023-03-24 2:24 ` [PATCH 10/41] arm64: dts: qcom: ipq6018: switch USB QMP PHY to new style of bindings Dmitry Baryshkov
2023-03-24 2:24 ` [PATCH 11/41] arm64: dts: qcom: ipq8074: " Dmitry Baryshkov
2023-03-24 2:24 ` [PATCH 12/41] arm64: dts: qcom: msm8996: " Dmitry Baryshkov
2023-03-24 2:24 ` [PATCH 13/41] arm64: dts: qcom: msm8998: " Dmitry Baryshkov
2023-03-24 2:24 ` [PATCH 14/41] arm64: dts: qcom: sdm845: " Dmitry Baryshkov
2023-03-24 2:24 ` [PATCH 15/41] arm64: dts: qcom: sm8150: " Dmitry Baryshkov
2023-03-24 2:24 ` [PATCH 16/41] arm64: dts: qcom: sm8250: " Dmitry Baryshkov
2023-03-24 2:24 ` [PATCH 17/41] arm64: dts: qcom: sm8350: " Dmitry Baryshkov
2023-03-24 2:24 ` [PATCH 18/41] arm64: dts: qcom: sc7180: switch USB+DP " Dmitry Baryshkov
2023-03-24 2:24 ` [PATCH 19/41] arm64: dts: qcom: sc7280: " Dmitry Baryshkov
2023-03-24 2:24 ` [PATCH 20/41] arm64: dts: qcom: sdm845: " Dmitry Baryshkov
2023-03-24 2:24 ` [PATCH 21/41] arm64: dts: qcom: sm8250: " Dmitry Baryshkov
2023-03-24 2:24 ` [PATCH 22/41] arm64: dts: qcom: msm8996: switch UFS " Dmitry Baryshkov
2023-03-24 2:24 ` [PATCH 23/41] arm64: dts: qcom: msm8998: " Dmitry Baryshkov
2023-03-24 2:24 ` [PATCH 24/41] arm64: dts: qcom: sdm845: " Dmitry Baryshkov
2023-03-24 2:24 ` [PATCH 25/41] arm64: dts: qcom: sm6115: " Dmitry Baryshkov
2023-03-24 2:24 ` [PATCH 26/41] arm64: dts: qcom: sm6350: " Dmitry Baryshkov
2023-03-24 2:25 ` [PATCH 27/41] arm64: dts: qcom: sm8150: " Dmitry Baryshkov
2023-03-24 2:25 ` [PATCH 28/41] arm64: dts: qcom: sm8250: " Dmitry Baryshkov
2023-03-24 2:25 ` [PATCH 29/41] arm64: dts: qcom: sm8350: " Dmitry Baryshkov
2023-03-24 2:25 ` [PATCH 30/41] arm64: dts: qcom: sm8450: " Dmitry Baryshkov
2023-03-24 2:25 ` [PATCH 31/41] arm64: dts: qcom: ipq6018: switch PCIe " Dmitry Baryshkov
2023-03-24 2:25 ` [PATCH 32/41] arm64: dts: qcom: ipq8074: " Dmitry Baryshkov
2023-03-24 2:25 ` [PATCH 33/41] arm64: dts: qcom: msm8998: " Dmitry Baryshkov
2023-03-24 2:25 ` [PATCH 34/41] arm64: dts: qcom: sc7280: " Dmitry Baryshkov
2023-03-24 2:25 ` [PATCH 35/41] arm64: dts: qcom: sdm845: " Dmitry Baryshkov
2023-03-24 2:25 ` Dmitry Baryshkov [this message]
2023-03-24 2:25 ` [PATCH 37/41] arm64: dts: qcom: sm8250: " Dmitry Baryshkov
2023-03-24 2:25 ` [PATCH 38/41] arm64: dts: qcom: sm8450: " Dmitry Baryshkov
2023-03-24 2:25 ` [PATCH 39/41] ARM: dts: qcom-sdx55: switch USB " Dmitry Baryshkov
2023-03-24 2:25 ` [PATCH 40/41] ARM: dts: qcom-sdx65: " Dmitry Baryshkov
2023-03-24 2:25 ` [PATCH 41/41] ARM: dts: qcom-sdx55: switch PCIe " Dmitry Baryshkov
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230324022514.1800382-37-dmitry.baryshkov@linaro.org \
--to=dmitry.baryshkov@linaro.org \
--cc=agross@kernel.org \
--cc=andersson@kernel.org \
--cc=johan+linaro@kernel.org \
--cc=kishon@kernel.org \
--cc=konrad.dybcio@linaro.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-phy@lists.infradead.org \
--cc=vkoul@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).