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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id d21-20020ac25455000000b004dc7fe3a2d3sm2283801lfn.135.2023.03.08.02.09.48 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 08 Mar 2023 02:09:50 -0800 (PST) Message-ID: <25c17af5-8f6b-a2c3-dab3-f9bc69711db7@linaro.org> Date: Wed, 8 Mar 2023 11:09:48 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.8.0 Subject: Re: [PATCH v7 3/6] phy: qcom-qmp: Add SM6125 UFS PHY support Content-Language: en-US To: Lux Aliaga , agross@kernel.org, andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, vkoul@kernel.org, kishon@kernel.org, alim.akhtar@samsung.com, avri.altman@wdc.com, bvanassche@acm.org, keescook@chromium.org, tony.luck@intel.com, gpiccoli@igalia.com Cc: ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-scsi@vger.kernel.org, linux-hardening@vger.kernel.org, phone-devel@vger.kernel.org, martin.botka@somainline.org, marijn.suijten@somainline.org References: <20230306170817.3806-1-they@mint.lgbt> <20230306170817.3806-4-they@mint.lgbt> From: Konrad Dybcio In-Reply-To: <20230306170817.3806-4-they@mint.lgbt> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230308_020957_744836_8CA05705 X-CRM114-Status: GOOD ( 15.76 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org On 6.03.2023 18:08, Lux Aliaga wrote: > The SM6125 UFS PHY is compatible with the one from SM6115. Add a > compatible for it and modify the config from SM6115 to make them > compatible with the SC8280XP binding > > Signed-off-by: Lux Aliaga > Reviewed-by: Martin Botka > --- > drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c > index 318eea35b972..44c29fdfc551 100644 > --- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c > @@ -620,6 +620,13 @@ static const char * const qmp_phy_vreg_l[] = { > "vdda-phy", "vdda-pll", > }; > > +static const struct qmp_ufs_offsets qmp_ufs_offsets_v3_660 = { > + .serdes = 0, > + .pcs = 0xc00, > + .tx = 0x400, > + .rx = 0x600, > +}; > + > static const struct qmp_ufs_offsets qmp_ufs_offsets_v5 = { > .serdes = 0, > .pcs = 0xc00, > @@ -693,6 +700,8 @@ static const struct qmp_phy_cfg sdm845_ufsphy_cfg = { > static const struct qmp_phy_cfg sm6115_ufsphy_cfg = { > .lanes = 1, > > + .offsets = &qmp_ufs_offsets_v3_660, Will this not trigger OOB r/w for the users of qcom,sm6115-smp-ufs-phy which specify the regions separately (old binding style)? Konrad > + > .serdes_tbl = sm6115_ufsphy_serdes_tbl, > .serdes_tbl_num = ARRAY_SIZE(sm6115_ufsphy_serdes_tbl), > .tx_tbl = sm6115_ufsphy_tx_tbl, > @@ -1172,6 +1181,9 @@ static const struct of_device_id qmp_ufs_of_match_table[] = { > }, { > .compatible = "qcom,sm6115-qmp-ufs-phy", > .data = &sm6115_ufsphy_cfg, > + }, { > + .compatible = "qcom,sm6125-qmp-ufs-phy", > + .data = &sm6115_ufsphy_cfg, > }, { > .compatible = "qcom,sm6350-qmp-ufs-phy", > .data = &sdm845_ufsphy_cfg, -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy