messages from 2021-02-16 04:40:06 to 2021-03-05 10:30:25 UTC [more...]
Commits for 5.11 stable
2021-03-05 10:30 UTC (7+ messages)
[PATCH -next] phy: ralink: phy-mt7621-pci: fix return value check in mt7621_pci_phy_probe()
2021-03-05 4:59 UTC (2+ messages)
[PATCH 0/4] PHY: Update Cadence Torrent PHY multilink configurations specific to TI
2021-03-04 6:08 UTC (5+ messages)
` [PATCH 1/4] phy: cadence-torrent: Update PCIe + QSGMII config for correct PLL1 clock
` [PATCH 2/4] phy: ti: j721e-wiz: Add support for configuring QSGMII
` [PATCH 3/4] phy: cadence-torrent: Update SGMII/QSGMII configuration specific to TI
` [PATCH 4/4] phy: cadence-torrent: Update PCIe + USB config for correct PLL1 clock
[PATCH -next] phy: ingenic: Fix a typo in ingenic_usb_phy_probe()
2021-03-05 3:49 UTC
[PATCH] phy: ralink: phy-mt7621-pci: fix XTAL bitmask
2021-03-02 12:28 UTC (2+ messages)
[PATCH v2 0/9] AM64: Add SERDES bindings and driver support
2021-03-04 4:45 UTC (12+ messages)
` [PATCH v2 1/9] dt-bindings: phy: ti, phy-j721e-wiz: Add bindings for AM64 SERDES Wrapper
` [PATCH v2 1/9] dt-bindings: phy: ti,phy-j721e-wiz: "
` [PATCH v2 2/9] dt-bindings: phy: cadence-torrent: Add binding for refclk driver
` [PATCH v2 3/9] dt-bindings: ti-serdes-mux: Add defines for AM64 SoC
` [PATCH v2 4/9] phy: ti: j721e-wiz: Remove "regmap_field" from wiz_clk_{mux|div}_sel
` [PATCH v2 5/9] phy: ti: j721e-wiz: Delete "clk_div_sel" clk provider during cleanup
` [PATCH v2 6/9] phy: ti: j721e-wiz: Configure full rate divider for AM64
` [PATCH v2 7/9] phy: ti: j721e-wiz: Model the internal clocks without device tree input
` [PATCH v2 8/9] phy: ti: j721e-wiz: Enable reference clock output in cmn_refclk_<p/m>
` [PATCH v2 9/9] phy: cadence-torrent: Add support to drive refclk out
[PATCH] MAINTAINERS: Add linux-phy list and patchwork
2021-02-26 11:18 UTC (2+ messages)
(ignore) creating initial archive entry
2021-02-15 21:25 UTC
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