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From: Philipp Zabel <p.zabel@pengutronix.de>
To: Yifeng Zhao <yifeng.zhao@rock-chips.com>,
	heiko@sntech.de,  robh+dt@kernel.org
Cc: devicetree@vger.kernel.org, vkoul@kernel.org,
	michael.riesch@wolfvision.net,
	 linux-rockchip@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	 linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org,
	kishon@ti.com
Subject: Re: [PATCH v2 2/3] phy/rockchip: add naneng combo phy for RK3568
Date: Thu, 14 Oct 2021 13:37:39 +0200	[thread overview]
Message-ID: <fdea4ea765654a6c8dc820d75a6c2faad2284723.camel@pengutronix.de> (raw)
In-Reply-To: <20211013101938.28061-3-yifeng.zhao@rock-chips.com>

Hi Yifeng,

On Wed, 2021-10-13 at 18:19 +0800, Yifeng Zhao wrote:
> This patch implements a combo phy driver for Rockchip SoCs
> with NaNeng IP block. This phy can be used as pcie-phy, usb3-phy,
> sata-phy or sgmii-phy.
> 
> Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
> ---
> 
> Changes in v2:
> - Using api devm_platform_get_and_ioremap_resource.
> - Modify rockchip_combphy_set_Mode.
> - Add some PHY registers definition.
> 
>  drivers/phy/rockchip/Kconfig                  |   8 +
>  drivers/phy/rockchip/Makefile                 |   1 +
>  .../rockchip/phy-rockchip-naneng-combphy.c    | 650 ++++++++++++++++++
>  3 files changed, 659 insertions(+)
>  create mode 100644 drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
> 
[...]
> diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
> new file mode 100644
> index 000000000000..fbfc5fbbd5b8
> --- /dev/null
> +++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
> @@ -0,0 +1,650 @@
[...]
> +static int rockchip_combphy_parse_dt(struct device *dev,
> +				     struct rockchip_combphy_priv *priv)
> +{
> +	const struct rockchip_combphy_cfg *phy_cfg = priv->cfg;
> +	int ret, mac_id;
> +
[...]
> +	priv->apb_rst = devm_reset_control_get_optional(dev, "combphy-apb");

Please use devm_reset_control_get_optional_exclusive().

Also, apb_rst is never used?

> +	if (IS_ERR(priv->apb_rst)) {
> +		ret = PTR_ERR(priv->apb_rst);
> +
> +		if (ret != -EPROBE_DEFER)
> +			dev_warn(dev, "failed to get apb reset\n");
> +
> +		return ret;

Any reason not to use dev_err_probe()?

> +	}
> +
> +	priv->phy_rst = devm_reset_control_get_optional(dev, "combphy");

Please use devm_reset_control_get_optional_exclusive().

> +	if (IS_ERR(priv->phy_rst)) {
> +		ret = PTR_ERR(priv->phy_rst);
> +
> +		if (ret != -EPROBE_DEFER)
> +			dev_warn(dev, "failed to get phy reset\n");
> +
> +		return ret;

Same as above.

> +	}
> +
> +	return reset_control_assert(priv->phy_rst);

It is unexpected that a function called rockchip_combphy_parse_dt()
already changes device state.

I'd move the reset_control_assert() out into rockchip_combphy_probe().

regards
Philipp

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  reply	other threads:[~2021-10-14 11:38 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-13 10:19 [PATCH v2 0/3] Add Naneng combo PHY support for RK3568 Yifeng Zhao
2021-10-13 10:19 ` [PATCH v2 1/3] dt-bindings: phy: rockchip: Add Naneng combo PHY bindings Yifeng Zhao
2021-10-25  7:07   ` Vinod Koul
2021-10-13 10:19 ` [PATCH v2 2/3] phy/rockchip: add naneng combo phy for RK3568 Yifeng Zhao
2021-10-14 11:37   ` Philipp Zabel [this message]
2021-10-22 10:49   ` Vinod Koul
2021-10-22 11:26     ` Peter Geis
2021-10-25  7:06       ` Vinod Koul
2021-10-13 10:19 ` [PATCH v2 3/3] arm64: dts: rockchip: add naneng combo phy nodes for rk3568 Yifeng Zhao

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