From: Zhang Rui <rui.zhang@intel.com>
To: rjw@rjwysocki.net
Cc: linux-pm@vger.kernel.org, srinivas.pandruvada@intel.com,
rui.zhang@intel.com
Subject: [PATCH 10/13] intel_rapl: support 64 bit register
Date: Fri, 28 Jun 2019 13:50:26 +0800 [thread overview]
Message-ID: <1561701029-3415-11-git-send-email-rui.zhang@intel.com> (raw)
In-Reply-To: <1561701029-3415-1-git-send-email-rui.zhang@intel.com>
RAPL MMIO interface uses 64 bit registers, thus force use 64 bit register
for all the RAPL code.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
---
drivers/powercap/intel_rapl.c | 11 +++++++----
drivers/powercap/intel_rapl_common.c | 6 +++---
include/linux/intel_rapl.h | 8 ++++----
3 files changed, 14 insertions(+), 11 deletions(-)
diff --git a/drivers/powercap/intel_rapl.c b/drivers/powercap/intel_rapl.c
index 67130c4..8868624 100644
--- a/drivers/powercap/intel_rapl.c
+++ b/drivers/powercap/intel_rapl.c
@@ -83,8 +83,10 @@ static int rapl_cpu_down_prep(unsigned int cpu)
static int rapl_msr_read_raw(int cpu, struct reg_action *ra)
{
- if (rdmsrl_safe_on_cpu(cpu, ra->reg, &ra->value)) {
- pr_debug("failed to read msr 0x%x on cpu %d\n", ra->reg, cpu);
+ u32 msr = (u32)ra->reg;
+
+ if (rdmsrl_safe_on_cpu(cpu, msr, &ra->value)) {
+ pr_debug("failed to read msr 0x%x on cpu %d\n", msr, cpu);
return -EIO;
}
ra->value &= ra->mask;
@@ -94,16 +96,17 @@ static int rapl_msr_read_raw(int cpu, struct reg_action *ra)
static void rapl_msr_update_func(void *info)
{
struct reg_action *ra = info;
+ u32 msr = (u32)ra->reg;
u64 val;
- ra->err = rdmsrl_safe(ra->reg, &val);
+ ra->err = rdmsrl_safe(msr, &val);
if (ra->err)
return;
val &= ~ra->mask;
val |= ra->value;
- ra->err = wrmsrl_safe(ra->reg, val);
+ ra->err = wrmsrl_safe(msr, val);
}
static int rapl_msr_write_raw(int cpu, struct reg_action *ra)
diff --git a/drivers/powercap/intel_rapl_common.c b/drivers/powercap/intel_rapl_common.c
index 8f589cf..f11bac7 100644
--- a/drivers/powercap/intel_rapl_common.c
+++ b/drivers/powercap/intel_rapl_common.c
@@ -689,7 +689,7 @@ static int rapl_read_data_raw(struct rapl_domain *rd,
ra.mask = rp->mask;
if (rd->rp->priv->read_raw(cpu, &ra)) {
- pr_debug("failed to read reg 0x%x on cpu %d\n", ra.reg, cpu);
+ pr_debug("failed to read reg 0x%llx on cpu %d\n", ra.reg, cpu);
return -EIO;
}
@@ -749,7 +749,7 @@ static int rapl_check_unit_core(struct rapl_package *rp, int cpu)
ra.reg = rp->priv->reg_unit;
ra.mask = ~0;
if (rp->priv->read_raw(cpu, &ra)) {
- pr_err("Failed to read power unit REG 0x%x on CPU %d, exit.\n",
+ pr_err("Failed to read power unit REG 0x%llx on CPU %d, exit.\n",
rp->priv->reg_unit, cpu);
return -ENODEV;
}
@@ -777,7 +777,7 @@ static int rapl_check_unit_atom(struct rapl_package *rp, int cpu)
ra.reg = rp->priv->reg_unit;
ra.mask = ~0;
if (rp->priv->read_raw(cpu, &ra)) {
- pr_err("Failed to read power unit REG 0x%x on CPU %d, exit.\n",
+ pr_err("Failed to read power unit REG 0x%llx on CPU %d, exit.\n",
rp->priv->reg_unit, cpu);
return -ENODEV;
}
diff --git a/include/linux/intel_rapl.h b/include/linux/intel_rapl.h
index e83739f..1ca0f69 100644
--- a/include/linux/intel_rapl.h
+++ b/include/linux/intel_rapl.h
@@ -78,7 +78,7 @@ struct rapl_package;
struct rapl_domain {
const char *name;
enum rapl_domain_type id;
- int regs[RAPL_DOMAIN_REG_MAX];
+ u64 regs[RAPL_DOMAIN_REG_MAX];
struct powercap_zone power_zone;
struct rapl_domain_data rdd;
struct rapl_power_limit rpl[NR_POWER_LIMITS];
@@ -89,7 +89,7 @@ struct rapl_domain {
};
struct reg_action {
- u32 reg;
+ u64 reg;
u64 mask;
u64 value;
int err;
@@ -99,8 +99,8 @@ struct rapl_priv {
struct powercap_control_type *control_type;
struct rapl_domain *platform_rapl_domain;
enum cpuhp_state pcap_rapl_online;
- u32 reg_unit;
- u32 regs[RAPL_DOMAIN_MAX][RAPL_DOMAIN_REG_MAX];
+ u64 reg_unit;
+ u64 regs[RAPL_DOMAIN_MAX][RAPL_DOMAIN_REG_MAX];
int (*read_raw)(int cpu, struct reg_action *ra);
int (*write_raw)(int cpu, struct reg_action *ra);
};
--
2.7.4
next prev parent reply other threads:[~2019-06-28 5:50 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-28 5:50 [PATCH 00/13] intel_rapl: RAPL abstraction and MMIO RAPL support Zhang Rui
2019-06-28 5:50 ` [PATCH 01/13] intel_rapl: use reg instead of msr Zhang Rui
2019-06-28 5:50 ` [PATCH 02/13] intel_rapl: remove hardcoded register index Zhang Rui
2019-06-28 5:50 ` [PATCH 03/13] intel_rapl: introduce intel_rapl.h Zhang Rui
2019-07-02 22:01 ` Rafael J. Wysocki
2019-07-02 22:13 ` Pandruvada, Srinivas
2019-07-02 23:26 ` Rafael J. Wysocki
2019-06-28 5:50 ` [PATCH 04/13] intel_rapl: introduce struct rapl_private Zhang Rui
2019-07-02 21:44 ` Rafael J. Wysocki
2019-07-03 8:14 ` Zhang Rui
2019-06-28 5:50 ` [PATCH 05/13] intel_rapl: abstract register address Zhang Rui
2019-06-28 5:50 ` [PATCH 06/13] intel_rapl: abstract register access operations Zhang Rui
2019-07-02 21:56 ` Rafael J. Wysocki
2019-07-03 8:14 ` Zhang Rui
2019-06-28 5:50 ` [PATCH 07/13] intel_rapl: cleanup some functions Zhang Rui
2019-06-28 5:50 ` [PATCH 08/13] intel_rapl: cleanup hardcoded MSR access Zhang Rui
2019-06-28 5:50 ` [PATCH 09/13] intel_rapl: abstract RAPL common code Zhang Rui
2019-07-02 21:59 ` Rafael J. Wysocki
2019-07-03 8:23 ` Zhang Rui
2019-07-03 9:02 ` Rafael J. Wysocki
2019-07-02 22:45 ` Pandruvada, Srinivas
2019-06-28 5:50 ` Zhang Rui [this message]
2019-06-28 5:50 ` [PATCH 11/13] intel_rapl: support two power limits for every RAPL domain Zhang Rui
2019-06-28 5:50 ` [PATCH 12/13] int340X/processor_thermal_device: add support for MMIO RAPL Zhang Rui
2019-06-28 5:50 ` [PATCH 13/13] intel_rapl: Fix module autoloading issue Zhang Rui
-- strict thread matches above, loose matches on Subject: below --
2019-06-25 15:16 [PATCH 00/13] intel_rapl: RAPL abstraction and MMIO RAPL support Zhang Rui
2019-06-25 15:16 ` [PATCH 10/13] intel_rapl: support 64 bit register Zhang Rui
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