From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.6 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 512C2C33CAC for ; Mon, 3 Feb 2020 13:37:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1784E2166E for ; Mon, 3 Feb 2020 13:37:35 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="pn9PBJJ3" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728091AbgBCNhb (ORCPT ); Mon, 3 Feb 2020 08:37:31 -0500 Received: from mail25.static.mailgun.info ([104.130.122.25]:11149 "EHLO mail25.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728086AbgBCNha (ORCPT ); Mon, 3 Feb 2020 08:37:30 -0500 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1580737050; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=3oBp+GQXIvHz9eMsTaJ9GKjk778UhbK5cdSMUYMH/24=; b=pn9PBJJ3kOQNkjBz2qEs9O+yDe+viQKd2pJnA32KvsAIyT2V7tD209I/SXI3/I09tE/WvrN4 F9df5fCxFZJ926eVUyfguuMqWNeRa1RyDaU/Wg5uzuCGkeEpT/11mE608cfmP0G1xk2DuCIF cg6DokL40jP/Q5wm/NUhvfU2JCA= X-Mailgun-Sending-Ip: 104.130.122.25 X-Mailgun-Sid: WyI5ZDFmMiIsICJsaW51eC1wbUB2Z2VyLmtlcm5lbC5vcmciLCAiYmU5ZTRhIl0= Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by mxa.mailgun.org with ESMTP id 5e382216.7f7af6bbad50-smtp-out-n02; Mon, 03 Feb 2020 13:37:26 -0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 1A969C447A4; Mon, 3 Feb 2020 13:37:26 +0000 (UTC) Received: from mkshah-linux.qualcomm.com (blr-c-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mkshah) by smtp.codeaurora.org (Postfix) with ESMTPSA id 14511C433CB; Mon, 3 Feb 2020 13:37:18 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 14511C433CB Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=mkshah@codeaurora.org From: Maulik Shah To: swboyd@chromium.org, agross@kernel.org, david.brown@linaro.org, sudeep.holla@arm.com, Lorenzo.Pieralisi@arm.com Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, bjorn.andersson@linaro.org, evgreen@chromium.org, dianders@chromium.org, rnayak@codeaurora.org, ilina@codeaurora.org, lsrao@codeaurora.org, ulf.hansson@linaro.org, rjw@rjwysocki.net, Maulik Shah Subject: [PATCH v3 4/7] drivers: qcom: rpmh-rsc: Add RSC power domain support Date: Mon, 3 Feb 2020 19:05:37 +0530 Message-Id: <1580736940-6985-5-git-send-email-mkshah@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1580736940-6985-1-git-send-email-mkshah@codeaurora.org> References: <1580736940-6985-1-git-send-email-mkshah@codeaurora.org> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Add RSC power domain support. RSC is top level power domain in hireachical CPU LPM modes. Once the rsc domain is down flush all cached sleep and wake votes from controller. Signed-off-by: Maulik Shah --- drivers/soc/qcom/rpmh-internal.h | 2 + drivers/soc/qcom/rpmh-rsc.c | 81 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 83 insertions(+) diff --git a/drivers/soc/qcom/rpmh-internal.h b/drivers/soc/qcom/rpmh-internal.h index 6eec32b..3736c14 100644 --- a/drivers/soc/qcom/rpmh-internal.h +++ b/drivers/soc/qcom/rpmh-internal.h @@ -8,6 +8,7 @@ #define __RPM_INTERNAL_H__ #include +#include #include #define TCS_TYPE_NR 4 @@ -102,6 +103,7 @@ struct rsc_drv { DECLARE_BITMAP(tcs_in_use, MAX_TCS_NR); spinlock_t lock; struct rpmh_ctrlr client; + struct generic_pm_domain rsc_pd; }; int rpmh_rsc_send_data(struct rsc_drv *drv, const struct tcs_request *msg); diff --git a/drivers/soc/qcom/rpmh-rsc.c b/drivers/soc/qcom/rpmh-rsc.c index e278fc1..92bca4c 100644 --- a/drivers/soc/qcom/rpmh-rsc.c +++ b/drivers/soc/qcom/rpmh-rsc.c @@ -499,6 +499,32 @@ static int tcs_ctrl_write(struct rsc_drv *drv, const struct tcs_request *msg) } /** + * rpmh_rsc_ctrlr_is_idle: Check if any of the AMCs are busy. + * + * @drv: The controller + * + * Return: false if the TCSes are engaged in handling requests, True otherwise. + */ +static bool rpmh_rsc_ctrlr_is_idle(struct rsc_drv *drv) +{ + int m; + struct tcs_group *tcs = get_tcs_of_type(drv, ACTIVE_TCS); + bool ret = true; + unsigned long flags; + + spin_lock_irqsave(&drv->lock, flags); + for (m = tcs->offset; m < tcs->offset + tcs->num_tcs; m++) { + if (!tcs_is_free(drv, m)) { + ret = false; + break; + } + } + spin_unlock_irqrestore(&drv->lock, flags); + + return ret; +} + +/** * rpmh_rsc_write_ctrl_data: Write request to the controller * * @drv: the controller @@ -521,6 +547,50 @@ int rpmh_rsc_write_ctrl_data(struct rsc_drv *drv, const struct tcs_request *msg) return tcs_ctrl_write(drv, msg); } +static int rpmh_domain_power_off(struct generic_pm_domain *rsc_pd) +{ + struct rsc_drv *drv = container_of(rsc_pd, struct rsc_drv, rsc_pd); + + /* + * RPMh domain can not be powered off when there is pending ACK for + * ACTIVE_TCS request. Exit when controller is busy. + */ + if (!rpmh_rsc_ctrlr_is_idle(drv)) + return -EBUSY; + + return rpmh_flush(&drv->client); +} + +static int rpmh_probe_power_domain(struct platform_device *pdev, + struct rsc_drv *drv) +{ + int ret; + struct generic_pm_domain *rsc_pd = &drv->rsc_pd; + struct device_node *dn = pdev->dev.of_node; + + rsc_pd->name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s", dn->name); + if (!rsc_pd->name) + return -ENOMEM; + + rsc_pd->name = kbasename(rsc_pd->name); + rsc_pd->power_off = rpmh_domain_power_off; + rsc_pd->flags |= GENPD_FLAG_IRQ_SAFE; + + ret = pm_genpd_init(rsc_pd, NULL, false); + if (ret) + return ret; + + ret = of_genpd_add_provider_simple(dn, rsc_pd); + if (ret) + goto remove_pd; + + return ret; + +remove_pd: + pm_genpd_remove(rsc_pd); + return ret; +} + static int rpmh_probe_tcs_config(struct platform_device *pdev, struct rsc_drv *drv) { @@ -663,6 +733,17 @@ static int rpmh_rsc_probe(struct platform_device *pdev) if (ret) return ret; + /* + * Power domain is not required for controllers that support 'solver' + * mode where they can be in autonomous mode executing low power mode + * to power down. + */ + if (of_property_read_bool(dn, "#power-domain-cells")) { + ret = rpmh_probe_power_domain(pdev, drv); + if (ret) + return ret; + } + /* Enable the active TCS to send requests immediately */ write_tcs_reg(drv, RSC_DRV_IRQ_ENABLE, 0, drv->tcs[ACTIVE_TCS].mask); -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation