From: Maulik Shah <mkshah@codeaurora.org>
To: swboyd@chromium.org, agross@kernel.org, david.brown@linaro.org,
sudeep.holla@arm.com, Lorenzo.Pieralisi@arm.com
Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
bjorn.andersson@linaro.org, evgreen@chromium.org,
dianders@chromium.org, rnayak@codeaurora.org,
ilina@codeaurora.org, lsrao@codeaurora.org,
ulf.hansson@linaro.org, rjw@rjwysocki.net,
Maulik Shah <mkshah@codeaurora.org>
Subject: [PATCH v3 7/7] arm64: dts: qcom: sc7180: Convert to the hierarchical CPU topology layout
Date: Mon, 3 Feb 2020 19:05:40 +0530 [thread overview]
Message-ID: <1580736940-6985-8-git-send-email-mkshah@codeaurora.org> (raw)
In-Reply-To: <1580736940-6985-1-git-send-email-mkshah@codeaurora.org>
To enable the OS to manage last-man standing activities for a CPU, while
an idle state for a group of CPUs is selected, let's convert the sc7180
platform into using the hierarchical CPU topology layout.
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 105 ++++++++++++++++++++++++++---------
1 file changed, 80 insertions(+), 25 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 0aa0ced..c366d10 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -86,9 +86,8 @@
compatible = "arm,armv8";
reg = <0x0 0x0>;
enable-method = "psci";
- cpu-idle-states = <&LITTLE_CPU_SLEEP_0
- &LITTLE_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
+ power-domains = <&CPU_PD0>;
+ power-domain-names = "psci";
next-level-cache = <&L2_0>;
#cooling-cells = <2>;
qcom,freq-domain = <&cpufreq_hw 0>;
@@ -106,9 +105,8 @@
compatible = "arm,armv8";
reg = <0x0 0x100>;
enable-method = "psci";
- cpu-idle-states = <&LITTLE_CPU_SLEEP_0
- &LITTLE_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
+ power-domains = <&CPU_PD1>;
+ power-domain-names = "psci";
next-level-cache = <&L2_100>;
#cooling-cells = <2>;
qcom,freq-domain = <&cpufreq_hw 0>;
@@ -123,9 +121,8 @@
compatible = "arm,armv8";
reg = <0x0 0x200>;
enable-method = "psci";
- cpu-idle-states = <&LITTLE_CPU_SLEEP_0
- &LITTLE_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
+ power-domains = <&CPU_PD2>;
+ power-domain-names = "psci";
next-level-cache = <&L2_200>;
#cooling-cells = <2>;
qcom,freq-domain = <&cpufreq_hw 0>;
@@ -140,9 +137,8 @@
compatible = "arm,armv8";
reg = <0x0 0x300>;
enable-method = "psci";
- cpu-idle-states = <&LITTLE_CPU_SLEEP_0
- &LITTLE_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
+ power-domains = <&CPU_PD3>;
+ power-domain-names = "psci";
next-level-cache = <&L2_300>;
#cooling-cells = <2>;
qcom,freq-domain = <&cpufreq_hw 0>;
@@ -157,9 +153,8 @@
compatible = "arm,armv8";
reg = <0x0 0x400>;
enable-method = "psci";
- cpu-idle-states = <&LITTLE_CPU_SLEEP_0
- &LITTLE_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
+ power-domains = <&CPU_PD4>;
+ power-domain-names = "psci";
next-level-cache = <&L2_400>;
#cooling-cells = <2>;
qcom,freq-domain = <&cpufreq_hw 0>;
@@ -174,9 +169,8 @@
compatible = "arm,armv8";
reg = <0x0 0x500>;
enable-method = "psci";
- cpu-idle-states = <&LITTLE_CPU_SLEEP_0
- &LITTLE_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
+ power-domains = <&CPU_PD5>;
+ power-domain-names = "psci";
next-level-cache = <&L2_500>;
#cooling-cells = <2>;
qcom,freq-domain = <&cpufreq_hw 0>;
@@ -191,9 +185,8 @@
compatible = "arm,armv8";
reg = <0x0 0x600>;
enable-method = "psci";
- cpu-idle-states = <&BIG_CPU_SLEEP_0
- &BIG_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
+ power-domains = <&CPU_PD6>;
+ power-domain-names = "psci";
next-level-cache = <&L2_600>;
#cooling-cells = <2>;
qcom,freq-domain = <&cpufreq_hw 1>;
@@ -208,9 +201,8 @@
compatible = "arm,armv8";
reg = <0x0 0x700>;
enable-method = "psci";
- cpu-idle-states = <&BIG_CPU_SLEEP_0
- &BIG_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
+ power-domains = <&CPU_PD7>;
+ power-domain-names = "psci";
next-level-cache = <&L2_700>;
#cooling-cells = <2>;
qcom,freq-domain = <&cpufreq_hw 1>;
@@ -264,7 +256,7 @@
};
CLUSTER_SLEEP_0: cluster-sleep-0 {
- compatible = "arm,idle-state";
+ compatible = "domain-idle-state";
idle-state-name = "cluster-power-down";
arm,psci-suspend-param = <0x40003444>;
entry-latency-us = <3263>;
@@ -375,6 +367,68 @@
psci {
compatible = "arm,psci-1.0";
method = "smc";
+
+ CPU_PD0: cpu-pd0 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&LITTLE_CPU_SLEEP_0>,
+ <&LITTLE_CPU_SLEEP_1>;
+ };
+
+ CPU_PD1: cpu-pd1 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&LITTLE_CPU_SLEEP_0>,
+ <&LITTLE_CPU_SLEEP_1>;
+ };
+
+ CPU_PD2: cpu-pd2 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&LITTLE_CPU_SLEEP_0>,
+ <&LITTLE_CPU_SLEEP_1>;
+ };
+
+ CPU_PD3: cpu-pd3 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&LITTLE_CPU_SLEEP_0>,
+ <&LITTLE_CPU_SLEEP_1>;
+ };
+
+ CPU_PD4: cpu-pd4 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&LITTLE_CPU_SLEEP_0>,
+ <&LITTLE_CPU_SLEEP_1>;
+ };
+
+ CPU_PD5: cpu-pd5 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&LITTLE_CPU_SLEEP_0>,
+ <&LITTLE_CPU_SLEEP_1>;
+ };
+
+ CPU_PD6: cpu-pd6 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&BIG_CPU_SLEEP_0>,
+ <&BIG_CPU_SLEEP_1>;
+ };
+
+ CPU_PD7: cpu-pd7 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&BIG_CPU_SLEEP_0>,
+ <&BIG_CPU_SLEEP_1>;
+ };
+
+ CLUSTER_PD: cluster-pd {
+ #power-domain-cells = <0>;
+ power-domains = <&apps_rsc>;
+ domain-idle-states = <&CLUSTER_SLEEP_0>;
+ };
};
soc: soc {
@@ -1495,6 +1549,7 @@
<SLEEP_TCS 3>,
<WAKE_TCS 3>,
<CONTROL_TCS 1>;
+ #power-domain-cells = <0>;
rpmhcc: clock-controller {
compatible = "qcom,sc7180-rpmh-clk";
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
prev parent reply other threads:[~2020-02-03 13:37 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-03 13:35 [PATCH v3 0/7] Add RSC power domain support Maulik Shah
2020-02-03 13:35 ` [PATCH v3 1/7] drivers: qcom: rpmh: fix macro to accept NULL argument Maulik Shah
2020-02-03 13:35 ` [PATCH v3 2/7] drivers: qcom: rpmh: remove rpmh_flush export Maulik Shah
2020-02-03 13:35 ` [PATCH v3 3/7] dt-bindings: soc: qcom: Add RSC power domain specifier Maulik Shah
2020-02-03 13:35 ` [PATCH v3 4/7] drivers: qcom: rpmh-rsc: Add RSC power domain support Maulik Shah
2020-02-03 13:35 ` [PATCH v3 5/7] drivers: firmware: psci: Add hierarchical domain idle states converter Maulik Shah
2020-02-03 17:08 ` Sudeep Holla
2020-02-04 4:52 ` Maulik Shah
2020-02-04 15:21 ` Sudeep Holla
2020-02-05 12:23 ` Maulik Shah
2020-02-05 14:06 ` Sudeep Holla
2020-02-05 15:55 ` Ulf Hansson
2020-02-05 16:18 ` Sudeep Holla
2020-02-06 8:45 ` Ulf Hansson
2020-02-06 20:45 ` Lina Iyer
2020-02-07 11:20 ` Sudeep Holla
2020-02-07 12:32 ` Ulf Hansson
2020-02-07 14:48 ` Lorenzo Pieralisi
2020-02-07 15:52 ` Ulf Hansson
2020-02-07 16:15 ` Sudeep Holla
2020-02-08 10:25 ` Ulf Hansson
2020-02-10 10:31 ` Sudeep Holla
2020-02-07 16:05 ` Sudeep Holla
2020-02-06 21:11 ` Bjorn Andersson
2020-02-07 11:25 ` Sudeep Holla
2020-02-03 13:35 ` [PATCH v3 6/7] arm64: dts: qcom: sc7180: Add cpuidle low power states Maulik Shah
2020-02-04 23:15 ` Matthias Kaehlcke
2020-02-05 12:07 ` Maulik Shah
2020-02-03 13:35 ` Maulik Shah [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1580736940-6985-8-git-send-email-mkshah@codeaurora.org \
--to=mkshah@codeaurora.org \
--cc=Lorenzo.Pieralisi@arm.com \
--cc=agross@kernel.org \
--cc=bjorn.andersson@linaro.org \
--cc=david.brown@linaro.org \
--cc=dianders@chromium.org \
--cc=evgreen@chromium.org \
--cc=ilina@codeaurora.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pm@vger.kernel.org \
--cc=lsrao@codeaurora.org \
--cc=rjw@rjwysocki.net \
--cc=rnayak@codeaurora.org \
--cc=sudeep.holla@arm.com \
--cc=swboyd@chromium.org \
--cc=ulf.hansson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).