From: Viresh Kumar <viresh.kumar@linaro.org>
To: Rajendra Nayak <rnayak@codeaurora.org>
Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-pm@vger.kernel.org, linux-serial@vger.kernel.org,
linux-spi@vger.kernel.org, dri-devel@lists.freedesktop.org,
linux-scsi@vger.kernel.org, swboyd@chromium.org,
ulf.hansson@linaro.org, dianders@chromium.org, rafael@kernel.org
Subject: Re: [RFC v2 09/11] drm/msm/dpu: Use OPP API to set clk/perf state
Date: Wed, 10 Apr 2019 09:19:28 +0530 [thread overview]
Message-ID: <20190410034928.wkfnebwmcdonhto6@vireshk-i7> (raw)
In-Reply-To: <20190320094918.20234-10-rnayak@codeaurora.org>
On 20-03-19, 15:19, Rajendra Nayak wrote:
> On some qualcomm platforms DPU needs to express a perforamnce state
> requirement on a power domain depennding on the clock rates.
> Use OPP table from DT to register with OPP framework and use
> dev_pm_opp_set_rate() to set the clk/perf state.
>
> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 7 ++++++-
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 9 +++++++++
> 2 files changed, 15 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
> index 9f20f397f77d..db21a86b242b 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
> @@ -15,6 +15,7 @@
> #include <linux/debugfs.h>
> #include <linux/errno.h>
> #include <linux/mutex.h>
> +#include <linux/pm_opp.h>
> #include <linux/sort.h>
> #include <linux/clk.h>
> #include <linux/bitmap.h>
> @@ -298,7 +299,11 @@ static int _dpu_core_perf_set_core_clk_rate(struct dpu_kms *kms, u64 rate)
> rate = core_clk->max_rate;
>
> core_clk->rate = rate;
> - return msm_dss_clk_set_rate(core_clk, 1);
> +
> + if (dev_pm_opp_get_opp_table(&kms->pdev->dev))
This takes a reference of the OPP table, you need to call put thing as well to
balance it off.
> + return dev_pm_opp_set_rate(&kms->pdev->dev, core_clk->rate);
> + else
> + return msm_dss_clk_set_rate(core_clk, 1);
> }
--
viresh
next prev parent reply other threads:[~2019-04-10 3:49 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-20 9:49 [RFC v2 00/11] DVFS in the OPP core Rajendra Nayak
2019-03-20 9:49 ` [RFC v2 01/11] OPP: Don't overwrite rounded clk rate Rajendra Nayak
2019-06-11 10:54 ` Viresh Kumar
2019-06-12 7:42 ` Rajendra Nayak
2019-06-12 8:25 ` Viresh Kumar
2019-06-13 9:54 ` Viresh Kumar
2019-06-14 5:27 ` Viresh Kumar
2019-06-17 3:50 ` Viresh Kumar
2019-06-17 4:07 ` Rajendra Nayak
2019-06-17 4:17 ` Viresh Kumar
2019-06-17 4:25 ` Rajendra Nayak
2019-06-14 5:54 ` Rajendra Nayak
2019-03-20 9:49 ` [RFC v2 02/11] OPP: Make dev_pm_opp_set_rate() with freq=0 as valid Rajendra Nayak
2019-06-14 6:32 ` Viresh Kumar
2019-06-17 4:04 ` Rajendra Nayak
2019-03-20 9:49 ` [RFC v2 03/11] tty: serial: qcom_geni_serial: Use OPP API to set clk/perf state Rajendra Nayak
2020-08-11 23:11 ` John Stultz
2020-08-12 1:33 ` John Stultz
2020-08-12 5:48 ` Rajendra Nayak
2020-08-12 7:35 ` Amit Pundir
2020-08-12 7:39 ` Rajendra Nayak
2020-08-12 9:26 ` Rajendra Nayak
2019-03-20 9:49 ` [RFC v2 04/11] spi: spi-geni-qcom: " Rajendra Nayak
2019-03-20 9:49 ` [RFC v2 05/11] arm64: dts: sdm845: Add OPP table for all qup devices Rajendra Nayak
2019-03-20 9:49 ` [RFC v2 06/11] scsi: ufs: Add support to manage multiple power domains in ufshcd-pltfrm Rajendra Nayak
2019-03-20 9:49 ` [RFC v2 07/11] scsi: ufs: Add support for specifying OPP tables in DT Rajendra Nayak
2019-03-20 9:49 ` [RFC v2 08/11] arm64: dts: sdm845: Add ufs opps and power-domains Rajendra Nayak
2019-05-14 7:53 ` Ulf Hansson
2019-05-14 7:53 ` Ulf Hansson
2019-03-20 9:49 ` [RFC v2 09/11] drm/msm/dpu: Use OPP API to set clk/perf state Rajendra Nayak
2019-04-10 3:49 ` Viresh Kumar [this message]
2019-04-10 3:49 ` Viresh Kumar
2019-03-20 9:49 ` [RFC v2 10/11] drm/msm: dsi: " Rajendra Nayak
2019-03-20 9:49 ` [RFC v2 11/11] arm64: dts: sdm845: Add DSI and MDP OPP tables and power-domains Rajendra Nayak
2019-04-10 3:51 ` [RFC v2 00/11] DVFS in the OPP core Viresh Kumar
2019-04-10 3:51 ` Viresh Kumar
2019-05-21 6:22 ` Viresh Kumar
2019-05-24 6:03 ` Rajendra Nayak
2019-06-17 4:26 ` Viresh Kumar
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190410034928.wkfnebwmcdonhto6@vireshk-i7 \
--to=viresh.kumar@linaro.org \
--cc=dianders@chromium.org \
--cc=dri-devel@lists.freedesktop.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pm@vger.kernel.org \
--cc=linux-scsi@vger.kernel.org \
--cc=linux-serial@vger.kernel.org \
--cc=linux-spi@vger.kernel.org \
--cc=rafael@kernel.org \
--cc=rnayak@codeaurora.org \
--cc=swboyd@chromium.org \
--cc=ulf.hansson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).