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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id u141sm5690928oie.40.2019.10.14.10.39.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Oct 2019 10:39:01 -0700 (PDT) Date: Mon, 14 Oct 2019 12:39:00 -0500 From: Rob Herring To: Jianxin Pan Cc: Kevin Hilman , linux-amlogic@lists.infradead.org, Neil Armstrong , Jerome Brunet , Martin Blumenstingl , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Jian Hu , Hanjie Lin , Victor Wan , Xingyu Chen Subject: Re: [PATCH RESEND v2 1/4] dt-bindings: power: add Amlogic secure power domains bindings Message-ID: <20191014173900.GA6886@bogus> References: <1570695678-42623-1-git-send-email-jianxin.pan@amlogic.com> <1570695678-42623-2-git-send-email-jianxin.pan@amlogic.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1570695678-42623-2-git-send-email-jianxin.pan@amlogic.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org On Thu, Oct 10, 2019 at 04:21:15AM -0400, Jianxin Pan wrote: > Add the bindings for the Amlogic Secure power domains, controlling the > secure power domains. > > The bindings targets the Amlogic A1 and C1 compatible SoCs, in which the > power domain registers are in secure world. > > Signed-off-by: Jianxin Pan > --- > .../bindings/power/amlogic,meson-sec-pwrc.yaml | 42 ++++++++++++++++++++++ > include/dt-bindings/power/meson-a1-power.h | 32 +++++++++++++++++ > 2 files changed, 74 insertions(+) > create mode 100644 Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml > create mode 100644 include/dt-bindings/power/meson-a1-power.h > > diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml > new file mode 100644 > index 00000000..88d8261 > --- /dev/null > +++ b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml > @@ -0,0 +1,42 @@ > +# SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +# Copyright (c) 2019 Amlogic, Inc > +# Author: Jianxin Pan > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/power/amlogic,meson-sec-pwrc.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: Amlogic Meson Secure Power Domains > + > +maintainers: > + - Jianxin Pan > + > +description: |+ > + Meson Secure Power Domains used in A1/C1 SoCs. > + > +properties: > + compatible: > + enum: > + - amlogic,meson-a1-pwrc > + > + "#power-domain-cells": > + const: 1 > + > + secure-monitor: > + description: phandle to the secure-monitor node > + $ref: /schemas/types.yaml#/definitions/phandle Why not just a child node of this node? Rob