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From: Viresh Kumar <viresh.kumar@linaro.org>
To: Anson Huang <Anson.Huang@nxp.com>
Cc: rjw@rjwysocki.net, shawnguo@kernel.org, s.hauer@pengutronix.de,
	kernel@pengutronix.de, festevam@gmail.com, abel.vesa@nxp.com,
	linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, Linux-imx@nxp.com
Subject: Re: [PATCH] cpufreq: imx-cpufreq-dt: Correct i.MX8MP's market segment fuse location
Date: Wed, 11 Mar 2020 11:33:30 +0530	[thread overview]
Message-ID: <20200311060330.ecvdlvflahdbptsi@vireshk-i7> (raw)
In-Reply-To: <1583819296-7763-1-git-send-email-Anson.Huang@nxp.com>

On 10-03-20, 13:48, Anson Huang wrote:
> i.MX8MP's market segment fuse field is bit[6:5], correct it.
> 
> Fixes: 83fe39ad0a48 ("cpufreq: imx-cpufreq-dt: Add i.MX8MP support")
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> ---
>  drivers/cpufreq/imx-cpufreq-dt.c | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/cpufreq/imx-cpufreq-dt.c b/drivers/cpufreq/imx-cpufreq-dt.c
> index 0e29d88..de206d2 100644
> --- a/drivers/cpufreq/imx-cpufreq-dt.c
> +++ b/drivers/cpufreq/imx-cpufreq-dt.c
> @@ -19,6 +19,8 @@
>  #define IMX8MN_OCOTP_CFG3_SPEED_GRADE_MASK	(0xf << 8)
>  #define OCOTP_CFG3_MKT_SEGMENT_SHIFT    6
>  #define OCOTP_CFG3_MKT_SEGMENT_MASK     (0x3 << 6)
> +#define IMX8MP_OCOTP_CFG3_MKT_SEGMENT_SHIFT    5
> +#define IMX8MP_OCOTP_CFG3_MKT_SEGMENT_MASK     (0x3 << 5)
>  
>  /* cpufreq-dt device registered by imx-cpufreq-dt */
>  static struct platform_device *cpufreq_dt_pdev;
> @@ -45,7 +47,13 @@ static int imx_cpufreq_dt_probe(struct platform_device *pdev)
>  	else
>  		speed_grade = (cell_value & OCOTP_CFG3_SPEED_GRADE_MASK)
>  			      >> OCOTP_CFG3_SPEED_GRADE_SHIFT;
> -	mkt_segment = (cell_value & OCOTP_CFG3_MKT_SEGMENT_MASK) >> OCOTP_CFG3_MKT_SEGMENT_SHIFT;
> +
> +	if (of_machine_is_compatible("fsl,imx8mp"))
> +		mkt_segment = (cell_value & IMX8MP_OCOTP_CFG3_MKT_SEGMENT_MASK)
> +			       >> IMX8MP_OCOTP_CFG3_MKT_SEGMENT_SHIFT;
> +	else
> +		mkt_segment = (cell_value & OCOTP_CFG3_MKT_SEGMENT_MASK)
> +			       >> OCOTP_CFG3_MKT_SEGMENT_SHIFT;
>  
>  	/*
>  	 * Early samples without fuses written report "0 0" which may NOT
> -- 

Applied. Thanks.

-- 
viresh

      reply	other threads:[~2020-03-11  6:03 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-10  5:48 [PATCH] cpufreq: imx-cpufreq-dt: Correct i.MX8MP's market segment fuse location Anson Huang
2020-03-11  6:03 ` Viresh Kumar [this message]

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