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Fri, 20 Mar 2020 16:09:32 -0700 (PDT) Received: from rob-hp-laptop ([64.188.179.250]) by smtp.gmail.com with ESMTPSA id g69sm1604552ile.3.2020.03.20.16.09.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Mar 2020 16:09:31 -0700 (PDT) Received: (nullmailer pid 14611 invoked by uid 1000); Fri, 20 Mar 2020 23:09:30 -0000 Date: Fri, 20 Mar 2020 17:09:30 -0600 From: Rob Herring To: Henry Chen Cc: Georgi Djakov , Matthias Brugger , Viresh Kumar , Stephen Boyd , Ryan Case , Mark Brown , Mark Rutland , Nicolas Boichat , Fan Chen , James Liao , Arvin Wang , Mike Turquette , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, srv_heupstream@mediatek.com Subject: Re: [PATCH V4 08/13] dt-bindings: interconnect: add MT8183 interconnect dt-bindings Message-ID: <20200320230930.GA10504@bogus> References: <1584092066-24425-1-git-send-email-henryc.chen@mediatek.com> <1584092066-24425-9-git-send-email-henryc.chen@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1584092066-24425-9-git-send-email-henryc.chen@mediatek.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org On Fri, Mar 13, 2020 at 05:34:21PM +0800, Henry Chen wrote: > Add interconnect provider dt-bindings for MT8183. > > Signed-off-by: Henry Chen > --- > .../devicetree/bindings/soc/mediatek/dvfsrc.txt | 9 +++++++++ > include/dt-bindings/interconnect/mtk,mt8183-emi.h | 18 ++++++++++++++++++ > 2 files changed, 27 insertions(+) > create mode 100644 include/dt-bindings/interconnect/mtk,mt8183-emi.h > > diff --git a/Documentation/devicetree/bindings/soc/mediatek/dvfsrc.txt b/Documentation/devicetree/bindings/soc/mediatek/dvfsrc.txt > index 7f43499..da98ec9 100644 > --- a/Documentation/devicetree/bindings/soc/mediatek/dvfsrc.txt > +++ b/Documentation/devicetree/bindings/soc/mediatek/dvfsrc.txt > @@ -12,6 +12,11 @@ Required Properties: > - clock-names: Must include the following entries: > "dvfsrc": DVFSRC module clock > - clocks: Must contain an entry for each entry in clock-names. > +- #interconnect-cells : should contain 1 > +- interconnect : interconnect providers support dram bandwidth requirements. > + The provider is able to communicate with the DVFSRC and send the dram > + bandwidth to it. shall contain only one of the following: > + "mediatek,mt8183-emi" > > Example: > > @@ -20,4 +25,8 @@ Example: > reg = <0 0x10012000 0 0x1000>; > clocks = <&infracfg CLK_INFRA_DVFSRC>; > clock-names = "dvfsrc"; > + ddr_emi: interconnect { > + compatible = "mediatek,mt8183-emi"; > + #interconnect-cells = <1>; Nodes with a compatible and no defined way to access the hardware always look suspicious. Can't you make the parent node an interconnect provider. Rob