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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id m11sm2227019ooe.43.2020.09.28.11.08.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Sep 2020 11:08:40 -0700 (PDT) Received: (nullmailer pid 3005882 invoked by uid 1000); Mon, 28 Sep 2020 18:08:39 -0000 Date: Mon, 28 Sep 2020 13:08:39 -0500 From: Rob Herring To: Ansuel Smith Cc: MyungJoo Ham , Kyungmin Park , Chanwoo Choi , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 2/2] dt-bindings: devfreq: Document L2 Krait CPU Cache devfreq driver Message-ID: <20200928180839.GB2999374@bogus> References: <20200927160515.6480-1-ansuelsmth@gmail.com> <20200927160515.6480-2-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200927160515.6480-2-ansuelsmth@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org On Sun, Sep 27, 2020 at 06:05:13PM +0200, Ansuel Smith wrote: > Document dedicated L2 Krait CPU Cache devfreq scaling driver. > > Signed-off-by: Ansuel Smith > --- > .../bindings/devfreq/krait-cache-devfreq.yaml | 77 +++++++++++++++++++ > 1 file changed, 77 insertions(+) > create mode 100644 Documentation/devicetree/bindings/devfreq/krait-cache-devfreq.yaml > > diff --git a/Documentation/devicetree/bindings/devfreq/krait-cache-devfreq.yaml b/Documentation/devicetree/bindings/devfreq/krait-cache-devfreq.yaml > new file mode 100644 > index 000000000000..099ed978e022 > --- /dev/null > +++ b/Documentation/devicetree/bindings/devfreq/krait-cache-devfreq.yaml > @@ -0,0 +1,77 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/cpufreq/krait-cache-devfreq.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: DEVFREQ driver for Krait L2 Cpu Cache Frequency Scaling Bindings are for h/w devices, not collections of properties for some driver. Define a binding for L2 cache and add on to it what you need. > + > +maintainers: > + - Ansuel Smith > + > +description: | > + This Scale the Krait CPU L2 Cache Frequency and optionally voltage > + when the Cpu Frequency is changed (using the cpufreq notifier). > + > + Cache is scaled with the max frequency across all core and the cache > + frequency will scale based on the configured threshold in the dts. > + > + The cache thresholds can be set to 3+ frequency bin, idle, nominal and > + high. > + > +properties: > + compatible: > + const: qcom,krait-cache > + > + clocks: > + $ref: "/schemas/types.yaml#/definitions/phandle" 'clocks' already has a type defined. You just need how many and what each entry is. > + description: Phandle to the L2 CPU clock > + > + clock-names: > + const: "l2" > + > + voltage-tolerance: > + description: Same voltage tolerance of the Krait CPU Needs a vendor prefix and unit suffix. > + > + l2-cpufreq: > + description: | > + Threshold used by the driver to scale the L2 cache. > + If the max CPU Frequency is more than the set frequency, > + the driver will transition to the next frequency bin. > + Value is in kHz > + $ref: /schemas/types.yaml#/definitions/uint32-array > + minItems: 3 > + items: > + - description: idle > + - description: nominal > + - description: high > + > + l2-supply: > + $ref: "/schemas/types.yaml#/definitions/phandle" > + description: Phandle to the L2 regulator supply. > + > + opp-table: true > + > +required: > + - compatible > + - clocks > + - clock-names > + - voltage-tolerance > + - l2-cpufreq > + > +examples: > + - | > + qcom-krait-cache { > + compatible = "qcom,krait-cache"; > + clocks = <&kraitcc 4>; > + clock-names = "l2"; > + l2-cpufreq = <384000 600000 1200000>; > + l2-supply = <&smb208_s1a>; > + > + operating-points = < Not documented and generally deprecated. > + /* kHz uV */ > + 384000 1100000 > + 1000000 1100000 > + 1200000 1150000 > + >; > + }; > -- > 2.27.0 >