From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.4 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 527A3C433E1 for ; Thu, 30 Jul 2020 15:35:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2D6DE20842 for ; Thu, 30 Jul 2020 15:35:35 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="V+Wky63G" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729802AbgG3Pfa (ORCPT ); Thu, 30 Jul 2020 11:35:30 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:49412 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726581AbgG3Pfa (ORCPT ); Thu, 30 Jul 2020 11:35:30 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 06UFZS8p120419; Thu, 30 Jul 2020 10:35:28 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1596123328; bh=qkK7AaYs5uCK3KrZbGZUjO5KrOQalLQCVGuPGcFJNZE=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=V+Wky63GNPKNXB/PwPyItMCJ+zq9RA7chWLxsZ3uIFhDJkK0DjPEr+ulTAR9j9R9a ZCwv9OWVEptt8a0I/4RbCIRCl5zjkViI+2rqv8lbY9+XBmrexB0XQOeVKYFFHvPfDN UdkzpUPgKuv6WCYPcmaffAUKM4xRHy9DfJFSGnLU= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id 06UFZSFo041942; Thu, 30 Jul 2020 10:35:28 -0500 Received: from DLEE109.ent.ti.com (157.170.170.41) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 30 Jul 2020 10:35:27 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 30 Jul 2020 10:35:27 -0500 Received: from [10.250.33.191] (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 06UFZRe2032994; Thu, 30 Jul 2020 10:35:27 -0500 Subject: Re: [PATCH 2/2] power: bq27xxx: Fix spacing style and white space issues To: "Andrew F. Davis" , , CC: , References: <20200730143122.28519-1-dmurphy@ti.com> <20200730143122.28519-2-dmurphy@ti.com> <99e39cd9-3c7f-908b-263f-42c78575bb29@ti.com> From: Dan Murphy Message-ID: <309330ca-d528-e77d-7dab-4bd741426ea1@ti.com> Date: Thu, 30 Jul 2020 10:35:27 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <99e39cd9-3c7f-908b-263f-42c78575bb29@ti.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Andrew On 7/30/20 10:25 AM, Andrew F. Davis wrote: > On 7/30/20 10:31 AM, Dan Murphy wrote: >> Fix spacing style issues with the chip data array. As well as fix >> missing new line after variable declaration. >> >> Signed-off-by: Dan Murphy >> --- >> drivers/power/supply/bq27xxx_battery.c | 63 ++++++++++++++------------ >> 1 file changed, 33 insertions(+), 30 deletions(-) >> >> diff --git a/drivers/power/supply/bq27xxx_battery.c b/drivers/power/supply/bq27xxx_battery.c >> index 8b112449ace8..e58039db8e64 100644 >> --- a/drivers/power/supply/bq27xxx_battery.c >> +++ b/drivers/power/supply/bq27xxx_battery.c >> @@ -871,35 +871,35 @@ static struct { >> enum power_supply_property *props; >> size_t props_size; >> } bq27xxx_chip_data[] = { >> - [BQ27000] = BQ27XXX_DATA(bq27000, 0 , BQ27XXX_O_ZERO), >> - [BQ27010] = BQ27XXX_DATA(bq27010, 0 , BQ27XXX_O_ZERO), >> - [BQ2750X] = BQ27XXX_DATA(bq2750x, 0 , BQ27XXX_O_OTDC), >> - [BQ2751X] = BQ27XXX_DATA(bq2751x, 0 , BQ27XXX_O_OTDC), >> - [BQ2752X] = BQ27XXX_DATA(bq2752x, 0 , BQ27XXX_O_OTDC), >> - [BQ27500] = BQ27XXX_DATA(bq27500, 0x04143672, BQ27XXX_O_OTDC), >> - [BQ27510G1] = BQ27XXX_DATA(bq27510g1, 0 , BQ27XXX_O_OTDC), >> - [BQ27510G2] = BQ27XXX_DATA(bq27510g2, 0 , BQ27XXX_O_OTDC), >> - [BQ27510G3] = BQ27XXX_DATA(bq27510g3, 0 , BQ27XXX_O_OTDC), >> - [BQ27520G1] = BQ27XXX_DATA(bq27520g1, 0 , BQ27XXX_O_OTDC), >> - [BQ27520G2] = BQ27XXX_DATA(bq27520g2, 0 , BQ27XXX_O_OTDC), >> - [BQ27520G3] = BQ27XXX_DATA(bq27520g3, 0 , BQ27XXX_O_OTDC), >> - [BQ27520G4] = BQ27XXX_DATA(bq27520g4, 0 , BQ27XXX_O_OTDC), >> - [BQ27521] = BQ27XXX_DATA(bq27521, 0 , 0), >> - [BQ27530] = BQ27XXX_DATA(bq27530, 0 , BQ27XXX_O_UTOT), >> - [BQ27531] = BQ27XXX_DATA(bq27531, 0 , BQ27XXX_O_UTOT), >> - [BQ27541] = BQ27XXX_DATA(bq27541, 0 , BQ27XXX_O_OTDC), >> - [BQ27542] = BQ27XXX_DATA(bq27542, 0 , BQ27XXX_O_OTDC), >> - [BQ27546] = BQ27XXX_DATA(bq27546, 0 , BQ27XXX_O_OTDC), >> - [BQ27742] = BQ27XXX_DATA(bq27742, 0 , BQ27XXX_O_OTDC), >> - [BQ27545] = BQ27XXX_DATA(bq27545, 0x04143672, BQ27XXX_O_OTDC), >> - [BQ27411] = BQ27XXX_DATA(bq27411, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM), >> - [BQ27421] = BQ27XXX_DATA(bq27421, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM), >> - [BQ27425] = BQ27XXX_DATA(bq27425, 0x04143672, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP), >> - [BQ27426] = BQ27XXX_DATA(bq27426, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM), >> - [BQ27441] = BQ27XXX_DATA(bq27441, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM), >> - [BQ27621] = BQ27XXX_DATA(bq27621, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM), >> - [BQ27Z561] = BQ27XXX_DATA(bq27z561, 0 , BQ27Z561_O_BITS), >> - [BQ28Z610] = BQ27XXX_DATA(bq28z610, 0 , BQ27Z561_O_BITS), >> + [BQ27000] = BQ27XXX_DATA(bq27000, 0, BQ27XXX_O_ZERO), > > The spacing before improved readability. In my opinon reordering this would improve readability or #defining the magic numbers to keep the alignment. Otherwise checkpatch produces 19 errors on this alone. Dan