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From: Chanwoo Choi <cw00.choi@samsung.com>
To: "Andrew-sh.Cheng" <andrew-sh.cheng@mediatek.com>,
	MyungJoo Ham <myungjoo.ham@samsung.com>,
	Kyungmin Park <kyungmin.park@samsung.com>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	"Rafael J . Wysocki" <rjw@rjwysocki.net>,
	Viresh Kumar <viresh.kumar@linaro.org>,
	Nishanth Menon <nm@ti.com>, Stephen Boyd <sboyd@kernel.org>,
	Liam Girdwood <lgirdwood@gmail.com>,
	Mark Brown <broonie@kernel.org>
Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org,
	srv_heupstream@mediatek.com
Subject: Re: [PATCH 08/12] dt-bindings: devfreq: add compatible for mt8183 cci devfreq
Date: Thu, 28 May 2020 16:42:16 +0900	[thread overview]
Message-ID: <4087bcdb-a247-3d2d-96b2-16f965e8ba5c@samsung.com> (raw)
In-Reply-To: <20200520034307.20435-9-andrew-sh.cheng@mediatek.com>

Hi,

On 5/20/20 12:43 PM, Andrew-sh.Cheng wrote:
> This adds dt-binding documentation of cci devfreq
> for Mediatek MT8183 SoC platform.
> 
> Signed-off-by: Andrew-sh.Cheng <andrew-sh.cheng@mediatek.com>
> ---
>  .../devicetree/bindings/devfreq/mt8183-cci.yaml    | 51 ++++++++++++++++++++++
>  1 file changed, 51 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/devfreq/mt8183-cci.yaml
> 
> diff --git a/Documentation/devicetree/bindings/devfreq/mt8183-cci.yaml b/Documentation/devicetree/bindings/devfreq/mt8183-cci.yaml
> new file mode 100644
> index 000000000000..a7341fd94097
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/devfreq/mt8183-cci.yaml
> @@ -0,0 +1,51 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: https://protect2.fireeye.com/url?k=33f1f15d-6e23ea05-33f07a12-0cc47a31c8b4-91b3f8aeecce95dc&q=1&u=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fdevfreq%2Fmt8183-cci.yaml%23
> +$schema: https://protect2.fireeye.com/url?k=fc7d9089-a1af8bd1-fc7c1bc6-0cc47a31c8b4-b46f5afc59faf86d&q=1&u=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23
> +
> +title: CCI_DEVFREQ driver for MT8183.
> +
> +maintainers:
> +  - Andrew-sh.Cheng <andrew-sh.cheng@mediatek.com>
> +
> +description: |
> +  This module is used to create CCI DEVFREQ.
> +  The performance will depend on both CCI frequency and CPU frequency.
> +  For MT8183, CCI co-buck with Little core.
> +  Contain CCI opp table for voltage and frequency scaling.
> +
> +properties:
> +  compatible:
> +    const: "mediatek,mt8183-cci"
> +
> +  clocks:
> +    maxItems: 1
> +
> +  clock-names:
> +    const: "cci"
> +
> +  operating-points-v2: true
> +  opp-table: true
> +
> +  proc-supply:
> +    description:
> +      Phandle of the regulator that provides the supply voltage.
> +
> +required:
> +  - compatible
> +  - clocks
> +  - clock-names
> +  - proc-supply
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/mt8183-clk.h>
> +    cci: cci {
> +      compatible = "mediatek,mt8183-cci";
> +      clocks = <&apmixedsys CLK_APMIXED_CCIPLL>;
> +      clock-names = "cci";
> +      operating-points-v2 = <&cci_opp>;
> +      proc-supply = <&mt6358_vproc12_reg>;
> +    };
> +
> 

I recommend that add the more detailed example
with OPP table with CPU node.


-- 
Best Regards,
Chanwoo Choi
Samsung Electronics

  parent reply	other threads:[~2020-05-28  7:32 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20200520034324epcas1p3affbd24bd1f3fe40d51baade07c1abba@epcas1p3.samsung.com>
     [not found] ` <20200520034307.20435-1-andrew-sh.cheng@mediatek.com>
2020-05-20  4:10   ` [PATCH 00/12] Add cpufreq and cci devfreq for mt8183, and SVS support Chanwoo Choi
     [not found]     ` <1589953015.8243.2.camel@mtksdaap41>
2020-05-20  6:24       ` Chanwoo Choi
     [not found]         ` <1589958625.23971.2.camel@mtksdaap41>
2020-05-20 14:53           ` Matthias Brugger
     [not found]   ` <20200520034307.20435-10-andrew-sh.cheng@mediatek.com>
2020-05-20 12:31     ` [PATCH 09/12] devfreq: add mediatek cci devfreq Mark Brown
2020-05-21  8:52       ` andrew-sh.cheng
2020-05-28  7:35     ` Chanwoo Choi
2020-05-28  8:00       ` Chanwoo Choi
     [not found]   ` <20200520034307.20435-2-andrew-sh.cheng@mediatek.com>
2020-05-20 14:54     ` [PATCH 01/12] OPP: Allow required-opps even if the device doesn't have power-domains Matthias Brugger
     [not found]   ` <CGME20200520034335epcas1p45a321a1a878fb7cd7b9c9ada0a474ef7@epcas1p4.samsung.com>
     [not found]     ` <20200520034307.20435-7-andrew-sh.cheng@mediatek.com>
2020-05-28  5:03       ` [PATCH 06/12] PM / devfreq: Add cpu based scaling support to passive_governor Chanwoo Choi
2020-05-28  6:14       ` Chanwoo Choi
2020-05-28  7:17         ` Chanwoo Choi
     [not found]           ` <1591100614.1804.1.camel@mtksdaap41>
2020-06-03  4:12             ` Chanwoo Choi
     [not found]         ` <1591098190.30729.15.camel@mtksdaap41>
2020-06-03  4:07           ` Chanwoo Choi
     [not found]   ` <CGME20200520034339epcas1p1524dea2d7089cb3492384bbe917dcffe@epcas1p1.samsung.com>
     [not found]     ` <20200520034307.20435-9-andrew-sh.cheng@mediatek.com>
2020-05-28  7:42       ` Chanwoo Choi [this message]
2020-06-15  7:31   ` [PATCH 00/12] Add cpufreq and cci devfreq for mt8183, and SVS support Viresh Kumar

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