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[109.252.170.211]) by smtp.googlemail.com with ESMTPSA id f24sm49863lja.104.2020.09.01.06.21.30 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 01 Sep 2020 06:21:31 -0700 (PDT) Subject: Re: [PATCH 3/3] ARM: tegra: Pass multiple versions in opp-supported-hw property To: Viresh Kumar Cc: Rob Herring , Thierry Reding , Jonathan Hunter , linux-pm@vger.kernel.org, Vincent Guittot , Rafael Wysocki , Stephen Boyd , Nishanth Menon , Stephan Gerhold , devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org References: <20200831043908.mtw4dglybcmcabjb@vireshk-i7> <0da380c2-9161-d450-afd2-4b159c8cfb7d@gmail.com> <20200831084111.6udzvrdonxgzju4l@vireshk-i7> <20200831110408.a6lwivim4w4jtkdc@vireshk-i7> From: Dmitry Osipenko Message-ID: <603071ec-6ae4-7e34-26e4-f64065b01ee0@gmail.com> Date: Tue, 1 Sep 2020 16:21:30 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20200831110408.a6lwivim4w4jtkdc@vireshk-i7> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org 31.08.2020 14:04, Viresh Kumar пишет: > On 31-08-20, 12:54, Dmitry Osipenko wrote: >> It's not clear to me how it could be applicable to the Tegra CPU OPP >> because Tegra depends on a combination of SPEEDO + PROCESS versions. >> >> It's not like all voltages are the same for all OPPs that have the same >> PROCESS ID, otherwise it indeed would be nice to have >> "opp-microvolt-process0", but unfortunately this variant is not suitable >> for Tegra because some freqs have different voltages using the same >> PROCESS ID and the same applies to the SPEEDO ID. > > How exactly do you know what voltage belongs to a particular OPP ? >From these tables: https://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=blob;f=arch/arm/mach-tegra/tegra2_dvfs.c;hb=l4t/l4t-r16-r2#l157 https://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=blob;f=arch/arm/mach-tegra/tegra3_dvfs.c;hb=l4t/l4t-r16-r2#l148 > opp@216000000 { > clock-latency-ns = <400000>; > opp-supported-hw = <0x0F 0x0003>; > opp-hz = /bits/ 64 <216000000>; > opp-microvolt-fast-process0 = <750000 750000 1125000>; > opp-microvolt-slow-process0 = <750000 850000 1125000>; > > }; > > opp@312000000 { > clock-latency-ns = <400000>; > opp-supported-hw = <0x0F 0x0003>; > opp-hz = /bits/ 64 <312000000>; > opp-microvolt-fast-process0 = <750000 750000 1125000>; > opp-microvolt-slow-process0 = <750000 850000 1125000>; > }; > > You can make any combinations of such names that come from speedo, > process, or something else. If you can get this done as a fixed > formula then it is workable. > IIUC, there is no fixed formula for Tegra, at least I don't see it. For example, if you'll take a look at the 1300MHz OPP of Tegra30, then you could see that this freq has a lot of voltages each depending on specific combination of SPEEDO+PROCESS versions.