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From: Chanwoo Choi <cw00.choi@samsung.com>
To: "Marek Szyprowski" <m.szyprowski@samsung.com>,
	cwchoi00@gmail.com, "Artur Świgoń" <a.swigon@partner.samsung.com>
Cc: devicetree <devicetree@vger.kernel.org>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	linux-samsung-soc <linux-samsung-soc@vger.kernel.org>,
	linux-kernel <linux-kernel@vger.kernel.org>,
	Linux PM list <linux-pm@vger.kernel.org>,
	dri-devel <dri-devel@lists.freedesktop.org>,
	Krzysztof Kozlowski <krzk@kernel.org>,
	MyungJoo Ham <myungjoo.ham@samsung.com>,
	inki.dae@samsung.com, Seung-Woo Kim <sw0312.kim@samsung.com>,
	georgi.djakov@linaro.org
Subject: Re: [RFC PATCH 08/11] arm: dts: exynos: Add parents and #interconnect-cells to Exynos4412
Date: Mon, 29 Jul 2019 10:20:44 +0900	[thread overview]
Message-ID: <64416ab4-855e-2bb6-199c-64086663a29f@samsung.com> (raw)
In-Reply-To: <cc4c48c3-06a5-c58f-20de-0aa18ae8667e@samsung.com>

Hi,

On 19. 7. 26. 오후 9:02, Marek Szyprowski wrote:
> Hi
> 
> On 2019-07-25 15:13, Chanwoo Choi wrote:
>> 2019년 7월 24일 (수) 오전 8:07, Artur Świgoń <a.swigon@partner.samsung.com>님이 작성:
>>> This patch adds two fields tp the Exynos4412 DTS:
>>>    - parent: to declare connections between nodes that are not in a
>>>      parent-child relation in devfreq;
>>>    - #interconnect-cells: required by the interconnect framework.
>>>
>>> Please note that #interconnect-cells is always zero and node IDs are not
>>> hardcoded anywhere.
>>>
>>> Signed-off-by: Artur Świgoń <a.swigon@partner.samsung.com>
>>> ---
>>>   arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 1 +
>>>   arch/arm/boot/dts/exynos4412.dtsi               | 9 +++++++++
>>>   2 files changed, 10 insertions(+)
>>>
>>> diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
>>> index ea55f377d17c..bdd61ae86103 100644
>>> --- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
>>> +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
>>> @@ -106,6 +106,7 @@
>>>   &bus_leftbus {
>>>          devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
>>>          vdd-supply = <&buck3_reg>;
>>> +       parent = <&bus_dmc>;
>> It is wrong. 'bus_leftbus' has not any h/w dependency of 'bus_dmc'
>> and 'bus_leftbus' is not child of 'bus_dmc'.
>>
>> Even it there are some PMQoS requirement between them,
>> it it not proper to tie both 'bus_leftbus' and 'bus_dmc'.
> 
> There is strict dependency between them. DMC bus running at frequency 
> lower than left (or right) bus really doesn't make much sense, because 
> it will limit the left bus performance. This dependency should be 
> modeled somehow.

I misunderstood new 'parent' prototype as the existing 'devfreq' property.
I didn't understand why use the 'devfreq' property because 'bus_dmc' and
'bus_leftbus' don't share the power line. Please ignore my previous comment.

Basically, I agree that it is necessary to support the QoS requirement
between buses or if possible, between bus and gpu.

To support the interconnect between bus_dmc, bus_leftbus and bus_display,
it used the either 'devfreq' or 'parent' properties to connect them.

In order to catch the meaning of 'devfreq' and 'parent' properties,
If possible, it would be separate the usage role of between 'devfreq'
or 'parent' properties. Because it is possible to connect the 'buses'
with only using 'parent' property if all buses in the path uses
the devfreq governors except for 'passive' governor.

- If 'devfreq' property is used between buses,
  it indicates that there are requirement of shading of power line.
- If 'parent' property is used between buses,
  it indicates that there are requirement of interconnect connection.

> 
>>>          status = "okay";
>>>   };
>>>
>>> diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
>>> index d20db2dfe8e2..a70a671acacd 100644
>>> --- a/arch/arm/boot/dts/exynos4412.dtsi
>>> +++ b/arch/arm/boot/dts/exynos4412.dtsi
>>> @@ -390,6 +390,7 @@
>>>                          clocks = <&clock CLK_DIV_DMC>;
>>>                          clock-names = "bus";
>>>                          operating-points-v2 = <&bus_dmc_opp_table>;
>>> +                       #interconnect-cells = <0>;
>>>                          status = "disabled";
>>>                  };
>>>
>>> @@ -398,6 +399,7 @@
>>>                          clocks = <&clock CLK_DIV_ACP>;
>>>                          clock-names = "bus";
>>>                          operating-points-v2 = <&bus_acp_opp_table>;
>>> +                       #interconnect-cells = <0>;
>>>                          status = "disabled";
>>>                  };
>>>
>>> @@ -406,6 +408,7 @@
>>>                          clocks = <&clock CLK_DIV_C2C>;
>>>                          clock-names = "bus";
>>>                          operating-points-v2 = <&bus_dmc_opp_table>;
>>> +                       #interconnect-cells = <0>;
>>>                          status = "disabled";
>>>                  };
>>>
>>> @@ -459,6 +462,7 @@
>>>                          clocks = <&clock CLK_DIV_GDL>;
>>>                          clock-names = "bus";
>>>                          operating-points-v2 = <&bus_leftbus_opp_table>;
>>> +                       #interconnect-cells = <0>;
>>>                          status = "disabled";
>>>                  };
>>>
>>> @@ -467,6 +471,7 @@
>>>                          clocks = <&clock CLK_DIV_GDR>;
>>>                          clock-names = "bus";
>>>                          operating-points-v2 = <&bus_leftbus_opp_table>;
>>> +                       #interconnect-cells = <0>;
>>>                          status = "disabled";
>>>                  };
>>>
>>> @@ -475,6 +480,7 @@
>>>                          clocks = <&clock CLK_ACLK160>;
>>>                          clock-names = "bus";
>>>                          operating-points-v2 = <&bus_display_opp_table>;
>>> +                       #interconnect-cells = <0>;
>>>                          status = "disabled";
>>>                  };
>>>
>>> @@ -483,6 +489,7 @@
>>>                          clocks = <&clock CLK_ACLK133>;
>>>                          clock-names = "bus";
>>>                          operating-points-v2 = <&bus_fsys_opp_table>;
>>> +                       #interconnect-cells = <0>;
>>>                          status = "disabled";
>>>                  };
>>>
>>> @@ -491,6 +498,7 @@
>>>                          clocks = <&clock CLK_ACLK100>;
>>>                          clock-names = "bus";
>>>                          operating-points-v2 = <&bus_peri_opp_table>;
>>> +                       #interconnect-cells = <0>;
>>>                          status = "disabled";
>>>                  };
>>>
>>> @@ -499,6 +507,7 @@
>>>                          clocks = <&clock CLK_SCLK_MFC>;
>>>                          clock-names = "bus";
>>>                          operating-points-v2 = <&bus_leftbus_opp_table>;
>>> +                       #interconnect-cells = <0>;
>>>                          status = "disabled";
>>>                  };
>>>
>>> --
>>> 2.17.1
>>>
>>
> Best regards
> 


-- 
Best Regards,
Chanwoo Choi
Samsung Electronics

  reply	other threads:[~2019-07-29  1:17 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20190723122022eucas1p2f568f74f981f9de9012eb693c3b446d5@eucas1p2.samsung.com>
2019-07-23 12:20 ` [RFC PATCH 00/11] Simple QoS for exynos-bus driver using interconnect Artur Świgoń
     [not found]   ` <CGME20190723122022eucas1p1266d90873d564894bd852c20140f8474@eucas1p1.samsung.com>
2019-07-23 12:20     ` [RFC PATCH 01/11] devfreq: exynos-bus: Extract exynos_bus_profile_init() Artur Świgoń
2019-07-24 19:07       ` Krzysztof Kozlowski
2019-07-31 13:00         ` Artur Świgoń
2019-08-05  9:56           ` Krzysztof Kozlowski
2019-07-25 12:43       ` Chanwoo Choi
2019-07-26 10:42         ` Krzysztof Kozlowski
2019-07-26 10:52           ` Chanwoo Choi
     [not found]   ` <CGME20190723122023eucas1p2ff56c00b60a676ed85d9fe159a1839f2@eucas1p2.samsung.com>
2019-07-23 12:20     ` [RFC PATCH 02/11] devfreq: exynos-bus: Extract exynos_bus_profile_init_passive() Artur Świgoń
2019-07-24 19:08       ` Krzysztof Kozlowski
2019-07-25 12:45       ` Chanwoo Choi
     [not found]   ` <CGME20190723122024eucas1p1ff060d072132bfbc8a8a1d10fa1f90f8@eucas1p1.samsung.com>
2019-07-23 12:20     ` [RFC PATCH 03/11] devfreq: exynos-bus: Change goto-based logic to if-else logic Artur Świgoń
2019-07-24 19:10       ` Krzysztof Kozlowski
2019-07-25 12:56       ` Chanwoo Choi
2019-07-25 13:02         ` Chanwoo Choi
     [not found]   ` <CGME20190723122024eucas1p25a480ccddaa69ee1d0f1a07960ca3f22@eucas1p2.samsung.com>
2019-07-23 12:20     ` [RFC PATCH 04/11] devfreq: exynos-bus: Clean up code Artur Świgoń
2019-07-24 19:14       ` Krzysztof Kozlowski
2019-07-25 12:50       ` Chanwoo Choi
2019-07-26 10:45         ` Krzysztof Kozlowski
2019-07-26 11:04           ` Chanwoo Choi
     [not found]   ` <CGME20190723122025eucas1p251df372451e0b27ad7f2e3c89df60b64@eucas1p2.samsung.com>
2019-07-23 12:20     ` [RFC PATCH 05/11] icc: Export of_icc_get_from_provider() Artur Świgoń
2019-07-24 19:15       ` Krzysztof Kozlowski
     [not found]   ` <CGME20190723122026eucas1p2acf705de2a47ba54f383d916f5383144@eucas1p2.samsung.com>
2019-07-23 12:20     ` [RFC PATCH 06/11] icc: Relax requirement in of_icc_get_from_provider() Artur Świgoń
2019-07-24 19:16       ` Krzysztof Kozlowski
     [not found]   ` <CGME20190723122027eucas1p124f44370a63b16dcb765585761d661a3@eucas1p1.samsung.com>
2019-07-23 12:20     ` [RFC PATCH 07/11] icc: Relax condition in apply_constraints() Artur Świgoń
     [not found]   ` <CGME20190723122027eucas1p24b1d76e3139f7cc52614d7613ff9ba98@eucas1p2.samsung.com>
2019-07-23 12:20     ` [RFC PATCH 08/11] arm: dts: exynos: Add parents and #interconnect-cells to Exynos4412 Artur Świgoń
2019-07-24 19:24       ` Krzysztof Kozlowski
2019-07-31 13:00         ` Artur Świgoń
2019-07-25 13:13       ` Chanwoo Choi
2019-07-26 12:02         ` Marek Szyprowski
2019-07-29  1:20           ` Chanwoo Choi [this message]
     [not found]   ` <CGME20190723122028eucas1p2eb75f35b810e71d6c590370aaff0997b@eucas1p2.samsung.com>
2019-07-23 12:20     ` [RFC PATCH 09/11] devfreq: exynos-bus: Add interconnect functionality to exynos-bus Artur Świgoń
2019-07-24 18:36       ` Krzysztof Kozlowski
2019-07-31 13:01         ` Artur Świgoń
2019-07-26  8:05       ` Georgi Djakov
2019-08-01  7:59         ` Artur Świgoń
2019-08-07 14:21           ` Georgi Djakov
2019-08-08 13:28             ` Artur Świgoń
2019-07-29  1:52       ` Chanwoo Choi
2019-08-08 13:18         ` Artur Świgoń
2019-08-09  2:17           ` Chanwoo Choi
2019-08-08 15:00         ` Leonard Crestez
2019-08-19 23:44           ` Chanwoo Choi
2019-08-06 13:41       ` Leonard Crestez
2019-08-08 13:19         ` Artur Świgoń
     [not found]   ` <CGME20190723122029eucas1p21e1a51e759f9b605d2c89daf659af7bb@eucas1p2.samsung.com>
2019-07-23 12:20     ` [RFC PATCH 10/11] arm: dts: exynos: Add interconnects to Exynos4412 mixer Artur Świgoń
     [not found]   ` <CGME20190723122029eucas1p2915f536d9ef43a7bd043a878a553439f@eucas1p2.samsung.com>
2019-07-23 12:20     ` [RFC PATCH 11/11] drm: exynos: mixer: Add interconnect support Artur Świgoń
2019-07-24 18:52       ` Krzysztof Kozlowski
2019-07-24 18:53   ` [RFC PATCH 00/11] Simple QoS for exynos-bus driver using interconnect Krzysztof Kozlowski
2019-08-13  6:17   ` Chanwoo Choi
2019-08-13  6:19     ` Chanwoo Choi

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