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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Dan Murphy <dmurphy@ti.com>
Cc: "Sebastian Reichel" <sre@kernel.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Pali Rohár" <pali@kernel.org>,
	linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 4/7] power: supply: bq27xxx: use BIT() for bit flags
Date: Wed, 9 Sep 2020 08:38:37 +0200	[thread overview]
Message-ID: <CAJKOXPfPsbbo3yTe4bL+-V=9YsHnyeiZt-dd2psQZezFdqb9DQ@mail.gmail.com> (raw)
In-Reply-To: <af09a19d-3261-a1bb-4d38-e7f543648154@ti.com>

On Tue, 8 Sep 2020 at 22:53, Dan Murphy <dmurphy@ti.com> wrote:
>
> Krzysztof
>
> On 9/8/20 3:13 PM, Krzysztof Kozlowski wrote:
> > BIT() is a preferred way to toggle bit-like flags: no problems with 32/64
> > bit systems, less chances for mistakes.
> >
> > Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
> > ---
> >   drivers/power/supply/bq27xxx_battery.c | 15 ++++++++-------
> >   1 file changed, 8 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/power/supply/bq27xxx_battery.c b/drivers/power/supply/bq27xxx_battery.c
> > index 2deac3fbb036..e971af43dd45 100644
> > --- a/drivers/power/supply/bq27xxx_battery.c
> > +++ b/drivers/power/supply/bq27xxx_battery.c
> > @@ -847,13 +847,14 @@ static struct bq27xxx_dm_reg bq27621_dm_regs[] = {
> >
> >   #define bq27z561_dm_regs 0
> >   #define bq28z610_dm_regs 0
> > -
> > -#define BQ27XXX_O_ZERO       0x00000001
> > -#define BQ27XXX_O_OTDC       0x00000002 /* has OTC/OTD overtemperature flags */
> > -#define BQ27XXX_O_UTOT  0x00000004 /* has OT overtemperature flag */
> > -#define BQ27XXX_O_CFGUP      0x00000008
> > -#define BQ27XXX_O_RAM        0x00000010
> > -#define BQ27Z561_O_BITS      0x00000020
> > +#define bq34z100_dm_regs 0
> > +
> > +#define BQ27XXX_O_ZERO               BIT(0)
> > +#define BQ27XXX_O_OTDC               BIT(1) /* has OTC/OTD overtemperature flags */
> > +#define BQ27XXX_O_UTOT               BIT(2) /* has OT overtemperature flag */
> > +#define BQ27XXX_O_CFGUP              BIT(3)
> > +#define BQ27XXX_O_RAM                BIT(4)
> > +#define BQ27Z561_O_BITS              BIT(5)
> >
>
> It seems you have added whitespaces that you submitted a patch to fix in
> 3/7.

I shouldn't... 3/7 is different #define: BQ27Z561_FLAG_FC
Here it might look like not indented properly due to the patch format.
In the file, when applying, the entries are aligned correctly.

>
> Also squash 3 and 4.

Whitespace with BIT conversion? Sure, I can. These are separate places
and different types of cleanup, but no problem to squash them.

Best regards,
Krzysztof

  reply	other threads:[~2020-09-09  6:38 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-08 20:13 [PATCH 1/7] dt-bindings: power: bq27xxx: add bq34z100 Krzysztof Kozlowski
2020-09-08 20:13 ` [PATCH 2/7] power: supply: bq27xxx: report "not charging" on all types Krzysztof Kozlowski
2020-09-08 20:54   ` Dan Murphy
2020-09-09  6:35     ` Krzysztof Kozlowski
2020-09-08 20:13 ` [PATCH 3/7] power: supply: bq27xxx: adjust whitespace Krzysztof Kozlowski
2020-09-08 20:13 ` [PATCH 4/7] power: supply: bq27xxx: use BIT() for bit flags Krzysztof Kozlowski
2020-09-08 20:53   ` Dan Murphy
2020-09-09  6:38     ` Krzysztof Kozlowski [this message]
2020-09-08 20:13 ` [PATCH 5/7] power: supply: bq27xxx: add separate flag for single SoC register Krzysztof Kozlowski
2020-09-08 20:13 ` [PATCH 6/7] power: supply: bq27xxx: add separate flag for capacity inaccurate Krzysztof Kozlowski
2020-09-08 20:13 ` [PATCH 7/7] power: supply: bq27xxx: add support for TI bq34z100 Krzysztof Kozlowski
2020-09-15 17:12 ` [PATCH 1/7] dt-bindings: power: bq27xxx: add bq34z100 Rob Herring

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