From: Thara Gopinath <thara.gopinath@linaro.org>
To: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: agross@kernel.org, rui.zhang@intel.com,
daniel.lezcano@linaro.org, viresh.kumar@linaro.org,
rjw@rjwysocki.net, robh+dt@kernel.org,
linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 2/5] thermal: qcom: Add support for LMh driver
Date: Fri, 18 Jun 2021 17:53:11 -0400 [thread overview]
Message-ID: <be5f133e-5fae-9a61-3cf5-7e611a17bc77@linaro.org> (raw)
In-Reply-To: <YMzd5OEhG4PYYv+E@builder.lan>
On 6/18/21 1:54 PM, Bjorn Andersson wrote:
> On Mon 14 Jun 20:38 CDT 2021, Thara Gopinath wrote:
>> On 6/14/21 4:53 PM, Bjorn Andersson wrote:
>>> On Tue 08 Jun 17:29 CDT 2021, Thara Gopinath wrote:
>>>> diff --git a/drivers/thermal/qcom/Makefile b/drivers/thermal/qcom/Makefile
> [..]
>>>> +static irqreturn_t lmh_handle_irq(int hw_irq, void *data)
>>>> +{
>>>> + struct lmh_hw_data *lmh_data = data;
>>>> + int irq = irq_find_mapping(lmh_data->domain, 0);
>>>> +
>>>> + /*
>>>> + * Disable interrupt and call the cpufreq driver to handle the interrupt
>>>> + * cpufreq will enable the interrupt once finished processing.
>>>> + */
>>>> + disable_irq_nosync(lmh_data->irq);
>>>
>>> The contract between this driver's disabling of the IRQ and the
>>> cpufreq-hw driver's enabling it when we're done polling does worry me.
>>>
>>> In the case of EPSS, don't we disable the interrupt during the polling
>>> there as well? If that's the case wouldn't it be better to implement
>>> irq_chip->irq_disable and have the cpufreq-hw driver do the disable in
>>> both cases?
>>
>> Yes. You are right. In case of EPSS, the cpufreq-hw will have to disable the
>> interrupt. I did think of the approach you suggested here. My only issue is
>> that we will dispatch the interrupt to cpufreq-hw without it disabling it
>> and hence the interrupt could fire again, right ?
>>
>
> Does it fire again before you INTR_CLK it?
You mean clear it ? I couldn't reproduce it either way. I did not try
the irq_chip->irq_disable either. So I will give it a try and if my
tests pass , I will post it.
>
> Regards,
> Bjorn
>
--
Warm Regards
Thara (She/Her/Hers)
next prev parent reply other threads:[~2021-06-18 21:53 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-08 22:29 [PATCH 0/5] Introduce LMh driver for Qualcomm SoCs Thara Gopinath
2021-06-08 22:29 ` [PATCH 1/5] firmware: qcom_scm: Introduce SCM calls to access LMh Thara Gopinath
2021-06-09 3:10 ` kernel test robot
2021-06-08 22:29 ` [PATCH 2/5] thermal: qcom: Add support for LMh driver Thara Gopinath
2021-06-09 2:25 ` Randy Dunlap
2021-06-15 1:37 ` Thara Gopinath
2021-06-14 20:53 ` Bjorn Andersson
2021-06-15 1:38 ` Thara Gopinath
2021-06-18 17:54 ` Bjorn Andersson
2021-06-18 21:53 ` Thara Gopinath [this message]
2021-06-08 22:29 ` [PATCH 3/5] cpufreq: qcom-cpufreq-hw: Add dcvs interrupt support Thara Gopinath
2021-06-14 10:31 ` Viresh Kumar
2021-06-15 1:58 ` Thara Gopinath
2021-06-15 5:16 ` Viresh Kumar
2021-06-18 18:16 ` Bjorn Andersson
2021-06-18 21:55 ` Thara Gopinath
2021-06-08 22:29 ` [PATCH 4/5] arm64: boot: dts: sdm45: Add support for LMh node Thara Gopinath
2021-06-08 22:29 ` [PATCH 5/5] arm64: boot: dts: qcom: sdm845: Remove passive trip points for thermal zones 0-7 Thara Gopinath
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