From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3FA74ECAAD8 for ; Wed, 14 Sep 2022 12:26:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229560AbiINM0a (ORCPT ); Wed, 14 Sep 2022 08:26:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41418 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229553AbiINM00 (ORCPT ); Wed, 14 Sep 2022 08:26:26 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9EBCD7DF6F; Wed, 14 Sep 2022 05:26:25 -0700 (PDT) Received: from [192.168.1.100] (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 1F851660201C; Wed, 14 Sep 2022 13:26:23 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1663158384; bh=EOvPaAPQay6+H5/vvnMCA8FXSUgtfRiBJVkGqDS8b+A=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=B8evYpC5rHOn3wXLr1ltYq8EJ/5zjF2RvyMBqF0VMnFwt0Cj37FWOeW33+VTg/oeQ Vvs7390adjB2YYZ4b6U7+xqzI48EolCfCJxJOQMYUp5CCDoVaj+9ddRKD9iYBcJVfZ SB6my2f00Mjz35i4iOrgVGN2OZNHISpukps2pw1iMptIpMvdi6xE8ucwdaQylrIdbh LrTP+2jSTAcjE4L0Ty0nT/pjR0raKAUPTyaIn4apX/dle0G6Cmgeb5sQ3tuV1RRuMz ICRwRuoFeaUMQ4hs2+/yjDBUoFJ3YStsTmeQEOXxGVHaz9ne669YneRBQEHAjvcAaN Bd/iZIY7+F/DA== Message-ID: Date: Wed, 14 Sep 2022 14:26:20 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.2.0 Subject: Re: [PATCH v9,3/7] arm64: dts: mt8192: Add thermal zones and thermal nodes Content-Language: en-US To: bchihi@baylibre.com, rafael@kernel.org, rui.zhang@intel.com, daniel.lezcano@linaro.org, amitk@kernel.org Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, khilman@baylibre.com, mka@chromium.org, robh+dt@kernel.org, krzk+dt@kernel.org, matthias.bgg@gmail.com, p.zabel@pengutronix.de, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, james.lo@mediatek.com, fan.chen@mediatek.com, louis.yu@mediatek.com, rex-bc.chen@mediatek.com, abailon@baylibre.com References: <20220817080757.352021-1-bchihi@baylibre.com> <20220817080757.352021-4-bchihi@baylibre.com> From: AngeloGioacchino Del Regno In-Reply-To: <20220817080757.352021-4-bchihi@baylibre.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Il 17/08/22 10:07, bchihi@baylibre.com ha scritto: > From: Balsam CHIHI > > Add thermal zones and thermal nodes for the mt8192. > > Signed-off-by: Balsam CHIHI > --- > arch/arm64/boot/dts/mediatek/mt8192.dtsi | 111 +++++++++++++++++++++++ > 1 file changed, 111 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > index cbae5a5ee4a0..59ef4da06a70 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > @@ -12,6 +12,7 @@ > #include > #include > #include > +#include > > / { > compatible = "mediatek,mt8192"; > @@ -599,6 +600,28 @@ spi0: spi@1100a000 { > status = "disabled"; > }; > > + lvts_ap: thermal-sensor@1100b000 { > + compatible = "mediatek,mt8192-lvts-ap"; > + #thermal-sensor-cells = <1>; > + reg = <0 0x1100b000 0 0x1000>; > + interrupts = ; > + clocks = <&infracfg CLK_INFRA_THERM>; > + resets = <&infracfg MT8192_INFRA_RST0_THERM_CTRL_SWRST>; > + nvmem-cells = <&lvts_e_data1>; > + nvmem-cell-names = "lvts_calib_data1"; > + }; > + > + lvts_mcu: thermal-sensor@11278000 { Please keep the nodes ordered by reg start. Regards, Angelo > + compatible = "mediatek,mt8192-lvts-mcu"; > + #thermal-sensor-cells = <1>; > + reg = <0 0x11278000 0 0x1000>; > + interrupts = ; > + clocks = <&infracfg CLK_INFRA_THERM>; > + resets = <&infracfg MT8192_INFRA_RST4_THERM_CTRL_MCU_SWRST>; > + nvmem-cells = <&lvts_e_data1>; > + nvmem-cell-names = "lvts_calib_data1"; > + }; > + > spi1: spi@11010000 { > compatible = "mediatek,mt8192-spi", > "mediatek,mt6765-spi";